Inventor profile of:

John Michael Greer

City:

Austin, Texas

Country:

United States

Published Applications:

19

Last publication date:

2017-11-02

Top Assignees for applications by John Michael Greer

The entities that hold a legal rights for patent applications filed by inventor Greer John Michael:

Recent patent applications by Greer John Michael

John Michael Greer from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2017-11-02
US20170315921A1
Physics

Cache memory budgeted by ways based on memory access type

#2 | 2017-05-04
US20170123985A1
Physics

Prefetching with level of aggressiveness based on effectiveness by memory access type

#3 | 2016-12-08
US20160357680A1
Physics

Set associative cache memory with heterogeneous replacement policy

#4 | 2016-12-08
US20160357677A1
Physics

Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type

#5 | 2016-12-01
US20160350228A1
Physics

Cache replacement policy that considers memory access type

#6 | 2016-12-01
US20160350227A1
Physics

Cache memory budgeted by chunks based on memory access type

#7 | 2016-07-07
US20160196214A1
Physics

Fully associative cache memory budgeted by memory access type

#8 | 2016-04-21
US20160110289A1
Physics

Dynamically updating hardware prefetch trait to exclusive or shared in multi-memory access agent system

#9 | 2016-04-21
US20160110194A1
Physics

Dynamically updating hardware prefetch trait to exclusive or shared at program detection

#10 | 2014-12-11
US20140365753A1
Physics

Selective accumulation and use of predicting unit history

#11 | 2014-10-16
US20140310479A1
Physics

Communicating prefetchers that throttle one another

#12 | 2014-09-25
US20140289479A1
Physics

Bounding box prefetcher

#13 | 2014-09-11
US20140258641A1
Physics

Communicating prefetchers in a microprocessor

#14 | 2014-01-02
US20140006718A1
Physics

Data prefetcher with complex stride predictor

#15 | 2011-09-29
US20110238923A1
Physics

Combined L2 cache and L1D cache prefetcher

#16 | 2011-09-29
US20110238922A1
Physics

Bounding box prefetcher

#17 | 2011-09-29
US20110238920A1
Physics

Bounding box prefetcher with reduced warm-up penalty on memory block crossings

#18 | 2011-02-10
US20110035551A1
Physics

Microprocessor with repeat prefetch indirect instruction

#19 | 2011-01-13
US20110010506A1
Physics

DATA PREFETCHER WITH MULTI-LEVEL TABLE FOR PREDICTING STRIDE PATTERNS

InventorID:

599702 ⎘