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Inventor profile of:

Hirosuke Narai

City:

Tokyo

Country:

Japan

Published Applications:

6

Last publication date:

2023-09-21

Top Assignees for applications by Hirosuke Narai

The entities that hold a legal rights for patent applications filed by inventor Narai Hirosuke:

  • Toshiba Memory Corporation 3 Tokyo, Japan
  • Kabushiki Kaisha Toshiba 2 Tokyo, Japan
  • Toshiba Tec Kabushiki Kaisha 1 Tokyo, Japan

Recent patent applications by Narai Hirosuke

Hirosuke Narai from Tokyo, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-09-21
US20230296669A1
Physics

Semiconductor device and test method of semiconductor device

#2 | 2017-06-08
US20170161140A1
Physics

Memory device that changes a writable region of a data buffer based on an operational state of an ECC circuit

#3 | 2017-06-08
US20170160972A1
Physics

Memory system having a semiconductor memory device with protected blocks

#4 | 2017-03-02
US20170062076A1
Physics

Memory system that handles access to bad blocks

#5 | 2017-03-02
US20170062066A1
Physics

Memory system

#6 | 2017-03-02
US20170060682A1
Physics

Memory device that changes a writable region of a data buffer based on an operational state of an ECC circuit

InventorID:

6005876 ⎘

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