Kuo-Cheng Lien

City:

Hsinchu

Country:

Taiwan

Published Applications:

Last publication date:

2020-12-31

Top Assignees for applications by Kuo-Cheng Lien

The entities that hold a legal rights for patent applications filed by inventor Lien Kuo-Cheng:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 6 Hsin-Chu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 3 Hsinchu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 1 Hsin-Chu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 1 Hsinchu, Taiwan

Recent patent applications by Lien Kuo-Cheng

Kuo-Cheng Lien from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-12-31

US20200407594A1

Chemistry; metallurgy

CMP slurry solution for hardened fluid material

#2 | 2017-12-07

US20170352548A1

Electricity

CMP-friendly coatings for planar recessing or removing of variable-height layers

#3 | 2017-06-08

US20170158914A1

Chemistry; metallurgy

CMP slurry solution for hardened fluid material

#4 | 2017-05-04

US20170125237A1

Electricity

Wafer back-side polishing system and method for integrated circuit device manufacturing processes

#5 | 2016-06-30

US20160190023A1

Electricity

Wafer back-side polishing system and method for integrated circuit device manufacturing processes

#6 | 2016-06-16

US20160172209A1

Electricity

CMP-friendly coatings for planar recessing or removing of variable-height layers

#7 | 2016-04-07

US20160099157A1

Electricity

BARC-assisted process for planar recessing or removing of variable-height layers

#8 | 2015-10-29

US20150307747A1

Chemistry; metallurgy

CMP slurry solution for hardened fluid material

#9 | 2015-09-17

US20150263132A1

Electricity

Barc-assisted process for planar recessing or removing of variable-height layers

#10 | 2015-08-20

US20150235858A1

Electricity

Wafer back-side polishing system and method for integrated circuit device manufacturing processes

InventorID:

6037192 ⎘