Inventor profile of:

Stefano Surico

City:

Milan

Country:

Italy

Published Applications:

17

Last publication date:

2026-04-30

Top Assignees for applications by Stefano Surico

The entities that hold a legal rights for patent applications filed by inventor Surico Stefano:

Recent patent applications by Surico Stefano

Stefano Surico from Milan, IT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-30
US20260120779A1
Physics

PROGRAM REFRESH FOR NON-VOLATILE MEMORY CELLS

#2 | 2012-05-03
US20120106250A1
Physics

Method and system for program pulse generation during programming of nonvolatile electronic devices

#3 | 2009-11-26
US20090290424A1
Physics

Method and system for program pulse generation during programming of nonvolatile electronic devices

#4 | 2008-12-18
US20080310232A1
Physics

Erase verify for memory devices

#5 | 2008-10-09
US20080250191A1
Physics

Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memory

#6 | 2008-10-09
US20080246504A1
Physics

Apparatus and method to manage external voltage for semiconductor memory testing with serial interface

#7 | 2008-06-19
US20080144379A1
Physics

Implementation of column redundancy for a flash memory with a high write parallelism

#8 | 2008-06-19
US20080143395A1
Physics

Method and device for managing a power supply power-on sequence

#9 | 2008-05-29
US20080123415A1
Physics

Low voltage column decoder sharing a memory array p-well

#10 | 2008-05-01
US20080101133A1
Physics

Adaptive gate voltage regulation

#11 | 2007-04-12
US20070083699A1
Physics

System for configuring parameters for a flash memory

#12 | 2006-11-09
US20060253644A1
Physics

Method and system for configuring parameters for flash memory

#13 | 2006-11-09
US20060250851A1
Physics

Method and system for program pulse generation during programming of nonvolatile electronic devices

#14 | 2006-07-20
US20060161727A1
Physics

Method and system for managing a suspend request in a flash memory

#15 | 2006-06-29
US20060140030A1
Physics

System for performing fast testing during flash reference cell setting

#16 | 2006-04-20
US20060085622A1
Physics

Method and system for managing address bits during buffered program operations in a memory device

#17 | 2006-04-13
US20060077714A1
Physics

Method and system for a programming approach for a nonvolatile electronic device

InventorID:

6095683 ⎘