Inventor profile of:

Gianfranco Cerofolini

City:

Milan

Country:

Italy

Published Applications:

14

Last publication date:

2015-03-26

Top Assignees for applications by Gianfranco Cerofolini

The entities that hold a legal rights for patent applications filed by inventor Cerofolini Gianfranco:

Recent patent applications by Cerofolini Gianfranco

Gianfranco Cerofolini from Milan, IT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-03-26
US20150083178A1
Electricity

Seebeck/peltier thermoelectric conversion device having phonon confinement layers of crystalline semiconductor containing angstrom-sized organic groups as semiconductor atoms substituents within the crystal lattice and fabrication process

#2 | 2012-07-12
US20120174954A1
Electricity

Seebeck/peltier thermoelectric conversion device employing treated films of semiconducting material not requiring nanometric definition

#3 | 2010-01-28
US20100019389A1
Electricity

Electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components

#4 | 2009-06-18
US20090154223A1
Physics

Method and device for demultiplexing a crossbar non-volatile memory

#5 | 2009-01-22
US20090020747A1
Electricity

Nanometric device with a hosting structure of nanometric elements

#6 | 2009-01-01
US20090003063A1
Physics

Method and device for demultiplexing a crossbar non-volatile memory

#7 | 2008-10-09
US20080246158A1
Performing operations; transporting

Method for realizing a nanometric circuit architecture between standard electronic components and semiconductor device obtained with said method

#8 | 2008-07-24
US20080174024A1
Electricity

Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components

#9 | 2007-08-02
US20070176208A1
Electricity

Hosting structure of nanometric elements and corresponding manufacturing method

#10 | 2007-06-28
US20070148975A1
Electricity

Method for realizing a multispacer structure, use of said structure as a mold and circuital architectures obtained from said mold

#11 | 2007-02-15
US20070038966A1
Electricity

Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components

#12 | 2006-03-09
US20060051946A1
Electricity

Method for realizing a hosting structure of nanometric elements

#13 | 2006-03-09
US20060051919A1
Electricity

Nanometric structure and corresponding manufacturing method

#14 | 2005-05-10
US10763626
-

Semiconductor integrated electronic device and corresponding manufacturing method

InventorID:

6137263 ⎘