Inventor profile of:

John E. Barth

City:

Williston, Vermont

Country:

United States

Published Applications:

14

Last publication date:

2016-05-26

Top Assignees for applications by John E. Barth

The entities that hold a legal rights for patent applications filed by inventor Barth John E.:

Recent patent applications by Barth John E.

John E. Barth from Williston, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2016-05-26
US20160148901A1
Electricity

Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array

#2 | 2014-01-23
US20140021585A1
Electricity

Creating deep trenches on underlying substrate

#3 | 2009-06-04
US20090144492A1
Physics

Structure for implementing dynamic refresh protocols for DRAM based cache

#4 | 2008-10-30
US20080270683A1
Physics

SYSTEMS AND METHODS FOR A DRAM CONCURRENT REFRESH ENGINE WITH PROCESSOR INTERFACE

#5 | 2008-01-03
US20080002497A1
Physics

Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devices

#6 | 2007-12-27
US20070297264A1
Physics

Memory cell access circuit

#7 | 2007-05-03
US20070097768A1
Physics

System and method for capacitive mis-match bit-line sensing

#8 | 2006-06-15
US20060124982A1
Electricity

Low-cost deep trench decoupling capacitor device and process of manufacture

#9 | 2006-06-08
US20060120144A1
Physics

APPARATUS AND METHOD FOR SMALL SIGNAL SENSING IN AN SRAM CELL UTILIZING PFET ACCESS DEVICES

#10 | 2005-10-13
US20050226024A1
Physics

Bitline twisting structure for memory arrays incorporating reference wordlines

#11 | 2005-09-22
US20050207210A1
Physics

Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devices

#12 | 2005-07-21
US20050157577A1
Physics

Concurrent refresh mode with distributed row address counters in an embedded DRAM

#13 | 2005-02-10
US20050030065A1
Electricity

System and method for implementing self-timed decoded data paths in integrated circuits

#14 | 2005-01-18
US10604109
-

High performance gain cell architecture

InventorID:

619797 ⎘