Thomas Feudel

Methods for fabricating integrated circuits using non-oxidizing resist removal

Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

Reduced STI loss for superior surface planarity of embedded stressors in densely packed semiconductor devices

Technique for enhancing transistor performance by transistor specific contact design

Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

Reducing transistor junction capacitance by recessing drain and source regions

Semiconductor device having improved halo structures and a method of forming the halo structures of a semiconductor device

Method of forming a semiconductor structure comprising an implantation of ions of a non-doping element

Reducing transistor junction capacitance by recessing drain and source regions

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING AN IMPLANTATION OF IONS IN A MATERIAL LAYER TO BE ETCHED

Enhancing transistor characteristics by a late deep implantation in combination with a diffusion-free anneal process

TECHNIQUE FOR ENHANCING DOPANT ACTIVATION BY USING MULTIPLE SEQUENTIAL ADVANCED LASER/FLASH ANNEAL PROCESSES

Technique for enhancing transistor performance by transistor specific contact design

Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques

Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor

METHOD OF INCREASING TRANSISTOR PERFORMANCE BY DOPANT ACTIVATION AFTER SILICIDATION

METHOD FOR FORMING ULTRA-SHALLOW HIGH QUALITY JUNCTIONS BY A COMBINATION OF SOLID PHASE EPITAXY AND LASER ANNEALING

Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors

CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure

Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same

Method of depositing a layer of a material on a substrate

Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device

Diode structure for SOI circuits

Methods of forming a transistor having a recessed gate electrode structure

Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers

Technique for adjusting a penetration depth during the implantation of ions into a semiconductor region

Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor

Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer

Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device