Noida
India
13
2020-09-22
The entities that hold a legal rights for patent applications filed by inventor Arora Puneet:
Puneet Arora from Noida, IN has applied for patents for these inventions. The list has both pending applications and granted patents:
Simulation event reduction and power control during MBIST through clock tree management
#2 | 2020-03-17Failing read count diagnostics for memory built-in self-test
#3 | 2019-12-10Multiple-channel, programmable fuse control unit
#4 | 2019-11-19Dynamic diagnostics analysis for memory built-in self-test
#5 | 2019-08-27Register-transfer level design engineering change order strategy
#6 | 2019-08-20Systems, methods, and computer-readable media utilizing improved data structures and design flow for programmable memory built-in self-test (PMBIST)
#7 | 2019-06-11Customizable built-in self-test testplans for memory units
#8 | 2019-01-29Test logic at register transfer level in an integrated circuit design
#9 | 2018-10-09Memory built-in self-test logic in an integrated circuit design
#10 | 2018-06-26Automated method identifying physical memories within a core or macro integrated circuit design
#11 | 2017-05-02Power domain aware insertion methods and designs for testing and repairing memory
#12 | 2014-03-27Method and apparatus for optimizing memory-built-in-self test
#13 | 2014-03-27Method and apparatus for optimizing memory-built-in-self test
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