Inventor profile of:

Graziano Mirichigni

City:

Vimercate

Country:

Italy

Published Applications:

95

Last publication date:

2026-02-05

Top Assignees for applications by Graziano Mirichigni

The entities that hold a legal rights for patent applications filed by inventor Mirichigni Graziano:

Recent patent applications by Mirichigni Graziano

Graziano Mirichigni from Vimercate, IT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-02-05
US20260038566A1
Physics

TEMPERATURE SENSOR READOUT FOR MEMORY SYSTEMS

#2 | 2025-10-23
US20250328247A1
Physics

FULL DUPLEX MEMORY SYSTEM

#3 | 2025-09-25
US20250298694A1
Physics

USER DATA BLOCK LEVEL ACCESS COUNTER

#4 | 2025-07-31
US20250245099A1
Physics

APPARATUSES AND METHODS TO PERFORM SELF-SCRUB OPERATIONS AT A MEMORY

#5 | 2025-06-05
US20250182800A1
Physics

TECHNIQUES FOR INDICATING ROW ACTIVATION

#6 | 2025-06-05
US20250181448A1
Physics

MEMORY SCRUBBING BASED ON DETECTED CORRECTABLE ERROR

#7 | 2025-04-24
US20250130718A1
Physics

FLEXIBLE SUB-CHANNEL SELECTION IN A SHARED COMMUNICATION CHANNEL

#8 | 2025-03-13
US20250087250A1
Physics

PROVIDING POWER AVAILABILITY INFORMATION TO MEMORY

#9 | 2025-03-06
US20250077348A1
Physics

POST PACKAGE REPAIR RESOURCES FOR MEMORY DEVICES

#10 | 2025-02-20
US20250061023A1
Physics

ECC CONFIGURATION IN MEMORIES

#11 | 2025-02-13
US20250053222A1
Physics

PROVIDING ENERGY INFORMATION TO MEMORY

#12 | 2025-01-02
US20250006248A1
Physics

ROW ACTIVATION INDICATION REGISTERS

#13 | 2024-11-21
US20240386956A1
Physics

Auto-referenced memory cell read techniques

#14 | 2024-10-24
US20240353914A1
Physics

BANK CONFIGURABLE POWER MODES

#15 | 2024-07-04
US20240221798A1
Physics

Techniques for indicating row activation

#16 | 2024-06-27
US20240211347A1
Physics

ECC configuration in memories

#17 | 2024-02-29
US20240069620A1
Physics

Providing energy information to memory

#18 | 2024-02-22
US20240061792A1
Physics

DATA IDENTITY RECOGNITION FOR SEMICONDUCTOR DEVICES

#19 | 2024-02-01
US20240037045A1
Physics

APPARATUSES AND METHODS FOR SECURING AN ACCESS PROTECTION SCHEME

#20 | 2024-01-25
US20240028099A1
Physics

Architecture-based power management for a memory device

#21 | 2024-01-04
US20240005964A1
Physics

Providing power availability information to memory

#22 | 2023-06-08
US20230176747A1
Physics

Memory device with data scrubbing capability and methods

#23 | 2023-04-27
US20230126944A1
Physics

Techniques for indicating row activation

#24 | 2023-04-13
US20230109794A1
Physics

Systems and methods for adaptive self-referenced reads of memory devices

#25 | 2023-04-06
US20230104012A1
Physics

Systems and methods for adaptive self-referenced reads of memory devices

#26 | 2023-01-05
US20230005533A1
Physics

Systems and methods for adaptive self-referenced reads of memory devices

#27 | 2023-01-05
US20230005532A1
Physics

Systems and methods for adaptive self-referenced reads of memory devices

#28 | 2022-11-10
US20220357791A1
Physics

Providing energy information to memory

#29 | 2022-06-30
US20220208262A1
Physics

Auto-referenced memory cell read techniques

#30 | 2022-06-02
US20220172750A1
Physics

Providing power availability information to memory

#31 | 2022-04-28
US20220129058A1
Physics

Architecture-based power management for a memory device

#32 | 2022-03-24
US20220091933A1
Physics

MEMORY APPARATUS AND METHOD FOR OPERATING THE SAME

#33 | 2022-01-13
US20220013157A1
Physics

Parallel access for memory subarrays

#34 | 2021-10-14
US20210319829A1
Physics

Dedicated commands for memory operations

#35 | 2021-09-16
US20210286737A1
Physics

Apparatuses and methods for securing an access protection scheme

#36 | 2021-08-19
US20210257022A1
Physics

Auto-referenced memory cell read techniques

#37 | 2021-03-04
US20210064119A1
Physics

Bank configurable power modes

#38 | 2021-03-04
US20210064113A1
Physics

Architecture-based power management for a memory device

#39 | 2021-01-21
US20210020239A1
Physics

Auto-referenced memory cell read techniques

#40 | 2021-01-21
US20210020213A1
Physics

Parallel access for memory subarrays

#41 | 2021-01-21
US20210020205A1
Physics

Providing power availability information to memory

#42 | 2020-12-10
US20200389778A1
Electricity

Wireless memory interface

#43 | 2020-11-05
US20200348999A1
Physics

Transaction metadata

#44 | 2020-10-22
US20200335159A1
Physics

Auto-referenced memory cell read techniques

#45 | 2020-09-17
US20200294586A1
Physics

Auto-referenced memory cell read techniques

#46 | 2020-07-09
US20200218645A1
Physics

Storage class memory status

#47 | 2020-07-02
US20200211641A1
Physics

Auto-referenced memory cell read techniques

#48 | 2020-03-12
US20200082883A1
Physics

Dedicated commands for memory operations

#49 | 2020-02-27
US20200064903A1
Physics

Providing energy information to memory

#50 | 2020-01-30
US20200035297A1
Physics

Auto-referenced memory cell read techniques

#51 | 2019-12-19
US20190384700A1
Physics

Methods and apparatuses for requesting ready status information from a memory

#52 | 2019-11-14
US20190347012A1
Physics

Performing wear leveling operations in a memory based on block cycles and use of spare blocks

#53 | 2019-11-07
US20190341083A1
Physics

Providing power availability information to memory

#54 | 2019-10-24
US20190324843A1
Physics

Transaction metadata

#55 | 2019-08-29
US20190266078A1
Physics

Storage class memory status

#56 | 2019-06-27
US20190198099A1
Physics

Auto-referenced memory cell read techniques

#57 | 2019-06-27
US20190198096A1
Physics

Auto-referenced memory cell read techniques

#58 | 2019-06-06
US20190171567A1
Physics

Apparatuses and methods for providing data to a configurable storage area

#59 | 2019-03-14
US20190080733A1
Physics

Apparatuses and methods for memory operations having variable latencies

#60 | 2019-01-17
US20190018618A1
Physics

Methods and apparatuses for executing a plurality of queued tasks in a memory

#61 | 2019-01-10
US20190012173A1
Physics

Apparatuses and methods for memory operations having variable latencies

#62 | 2018-12-06
US20180349302A1
Physics

Apparatuses and methods for variable latency memory operations

#63 | 2018-11-22
US20180336146A1
Physics

Providing energy information to memory

#64 | 2018-05-10
US20180129442A1
Physics

Systems and methods for providing file information in a memory system protocol

#65 | 2018-05-03
US20180121356A1
Physics

Apparatuses and methods for providing data to a configurable storage area

#66 | 2018-04-19
US20180108384A1
Physics

Providing power availability information to memory

#67 | 2018-02-08
US20180039572A1
Physics

Methods and apparatuses for requesting ready status information from a memory

#68 | 2017-11-16
US20170329534A1
Physics

Apparatuses and methods for variable latency memory operations

#69 | 2017-11-02
US20170315734A1
Physics

Memory devices for detecting known initial states and related methods and electronic systems

#70 | 2017-10-26
US20170309318A1
Physics

Apparatuses and methods for memory operations having variable latencies

#71 | 2017-10-26
US20170308382A1
Physics

Apparatuses and methods for memory operations having variable latencies

#72 | 2017-10-19
US20170300413A1
Physics

Apparatuses and methods for providing data to a configurable storage area

#73 | 2017-06-08
US20170162254A1
Physics

Providing power availability information to memory

#74 | 2017-03-23
US20170083263A1
Physics

Apparatuses and methods for providing data from a buffer

#75 | 2017-03-23
US20170083260A1
Physics

Systems and methods for providing file information in a memory system protocol

#76 | 2017-02-02
US20170031851A1
Physics

Interrupted write operation in a serial interface memory with a portion of a memory address

#77 | 2016-07-28
US20160217831A1
Physics

Providing power availability information to memory

#78 | 2016-05-19
US20160140049A1
Physics

Wireless memory interface

#79 | 2015-12-03
US20150348599A1
Physics

Providing power availability information to memory

#80 | 2015-12-03
US20150347038A1
Physics

Apparatuses and methods for performing write count threshold wear leveling operations

#81 | 2015-10-29
US20150309868A1
Physics

Method and apparatus to perform concurrent read and write memory operations

#82 | 2015-10-08
US20150286585A1
Physics

Apparatuses and methods for securing an access protection scheme

#83 | 2015-07-30
US20150212738A1
Physics

Methods and apparatuses for executing a plurality of queued tasks in a memory

#84 | 2015-04-09
US20150100744A1
Physics

Methods and apparatuses for requesting ready status information from a memory

#85 | 2015-02-19
US20150052299A1
Physics

Apparatuses and methods for providing data to a configurable storage area

#86 | 2015-02-19
US20150052288A1
Physics

Apparatuses and methods for providing data from a buffer

#87 | 2014-11-20
US20140340135A1
Electricity

Controlling clock input buffers

#88 | 2014-09-18
US20140281182A1
Physics

Apparatuses and methods for variable latency memory operations

#89 | 2014-09-04
US20140250249A1
Physics

Interrupted write memory operation in a serial interface memory with a portion of a memory address

#90 | 2014-05-01
US20140122822A1
Physics

Apparatuses and methods for memory operations having variable latencies

#91 | 2014-05-01
US20140122814A1
Physics

Apparatuses and methods for memory operations having variable latencies

#92 | 2014-03-06
US20140068380A1
Physics

Method and apparatus to perform concurrent read and write memory operations

#93 | 2012-12-13
US20120314522A1
Electricity

Controlling clock input buffers

#94 | 2012-05-17
US20120124449A1
Physics

Method and apparatus to perform concurrent read and write memory operations

#95 | 2012-05-17
US20120124317A1
Physics

Interruption of write memory operations to provide faster read access in a serial interface memory

InventorID:

748468 ⎘