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Inventor profile of:

Darsith Jayachandran

City:

Menands, New York

Country:

United States

Published Applications:

5

Last publication date:

2026-06-25

Recent patent applications by Jayachandran Darsith

Darsith Jayachandran from Menands, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-06-25
US20260182352A1
Electricity

TWO-DIMENSIONAL LINER-BASED RESISTANCE REDUCTION FOR SUBTRACTIVE PATTERNING

#2 | 2026-05-28
US20260150644A1
Electricity

ELECTROMAGNETICALLY SHIELDED STACKED TRANSISTOR ARCHITECTURE

#3 | 2026-03-05
US20260068305A1
Electricity

BACKSIDE PLACEHOLDER MODIFICATION WITH NARROW ACTIVE REGION AND BACKSIDE CONTACT

#4 | 2026-02-05
US20260040673A1
Electricity

STACKED TRANSISTOR WITH 2D MATERIAL CHANNELS

#5 | 2026-02-05
US20260040649A1
Electricity

DIRECT BACKSIDE CONTACT TO 2D MATERIAL CHANNEL TRANSISTOR

InventorID:

7700928 ⎘

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