Inventor profile of:

Ferdinando Bedeschi

City:

Biassono (MI)

Country:

Italy

Published Applications:

21

Last publication date:

2016-08-25

Top Assignees for applications by Ferdinando Bedeschi

The entities that hold a legal rights for patent applications filed by inventor Bedeschi Ferdinando:

Recent patent applications by Bedeschi Ferdinando

Ferdinando Bedeschi from Biassono (MI), IT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2016-08-25
US20160247562A1
Physics

Apparatuses and methods of reading memory cells

#2 | 2016-01-21
US20160019958A1
Physics

Descending set verify for phase change memory

#3 | 2015-11-12
US20150325293A1
Physics

Program-disturb decoupling for adjacent wordlines of a memory device

#4 | 2015-06-04
US20150154068A1
Physics

Memory device having address and command selectable capabilities

#5 | 2015-06-04
US20150154060A1
Physics

Error detection or correction of stored signals after one or more heat events in one or more memory devices

#6 | 2015-04-09
US20150098269A1
Physics

Read distribution management for phase change memory

#7 | 2015-04-02
US20150095560A1
Physics

Program-disturb management for phase change memory

#8 | 2015-01-01
US20150003149A1
Physics

Mixed mode programming for phase change memory

#9 | 2013-11-21
US20130311837A1
Physics

Program-disturb management for phase change memory

#10 | 2013-10-31
US20130290604A1
Physics

Program-disturb decoupling for adjacent wordlines of a memory device

#11 | 2013-10-24
US20130279238A1
Physics

Programming an array of resistance random access memory cells using unipolar pulses

#12 | 2013-10-17
US20130272063A1
Physics

Read distribution management for phase change memory

#13 | 2013-10-03
US20130262743A1
Physics

Encoding program bits to decouple adjacent wordlines in a memory device

#14 | 2013-08-29
US20130227369A1
Physics

Error detection or correction of stored signals after one or more heat events in one or more memory devices

#15 | 2013-01-10
US20130010533A1
Physics

Descending set verify for phase change memory

#16 | 2013-01-03
US20130007564A1
Physics

Memory device having address and command selectable capabilities

#17 | 2013-01-03
US20130003450A1
Physics

Mixed mode programming for phase change memory

#18 | 2012-07-19
US20120182783A1
Physics

Programming an array of resistance random access memory cells using unipolar pulses

#19 | 2012-04-19
US20120092923A1
Physics

Read distribution management for phase change memory

#20 | 2010-07-01
US20100165725A1
Physics

Reliable set operation for phase-change memory cell

#21 | 2006-03-30
US20060067154A1
Physics

Biasing circuit for use in a non-volatile memory device

InventorID:

8030 ⎘