Ravi Sunkavalli

Hierarchical global clock tree

System and method of signal processing engines with programmable logic fabric

Reset signal distribution

System and method of signal processing engines with programmable logic fabric

System and method of configurable bus-based dedicated connection circuits

Hierarchical global clock tree

Source-synchronous clocking

Reset signal distribution

Programmable logic systems and methods employing configurable floating point units

Programmable logic systems and methods employing configurable floating point units

Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes

Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes

Dedicated logic cells employing configurable logic and dedicated logic functions

Programmable logic cells with local connections

Dedicated logic cells employing sequential logic and control logic functions

Dedicated logic cells employing sequential logic and control logic functions

Dedicated logic cells employing configurable logic and dedicated logic functions

Dedicated logic cells employing configurable logic and dedicated logic functions

Dedicated logic cells employing configurable logic and dedicated logic functions

Dedicated logic cells employing sequential logic and control logic functions

Programmable logic cells with local connections

Programmable logic and routing blocks with dedicated lines