Mountain View, California
United States
19
2025-05-22
The entities that hold a legal rights for patent applications filed by inventor BRAUN Eric:
Eric BRAUN from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:
SEMICONDUCTOR DEVICE WITH GROUP III-V COMPOUND MATERIAL
#2 | 2025-05-22SWITCHING CIRCUIT WITH A TRANSISTOR HAVING MULTIPLE PULL DOWN PATHS
#3 | 2022-11-24Low leakage ESD MOSFET
#4 | 2022-01-20FET device insensitive to noise from drive path
#5 | 2021-11-18SCHOTTKY CONTACT REGION FOR HOLE INJECTION SUPPRESSION
#6 | 2020-05-07LDMOS DEVICE WITH A DRAIN CONTACT STRUCTURE WITH REDUCED SIZE
#7 | 2020-03-05LDMOS device with a field plate contact metal layer with a sub-maximum size
#8 | 2019-03-21Bi-directional snapback ESD protection circuit
#9 | 2018-10-04SEMICONDUCTOR DEVICE WITH SNUBBER AND ASSOCIATED FABRICATION METHOD
#10 | 2018-02-13Lateral DMOS and the method for forming thereof
#11 | 2017-10-05Multi-time programmable non-volatile memory cell and associated circuits
#12 | 2017-09-07Synchronous switching converter and associated integrated semiconductor device
#13 | 2017-09-07Bi-directional snapback ESD protection circuit
#14 | 2017-07-27Semiconductor device reducing parasitic loop inductance of system
#15 | 2017-06-22ESD protection circuit with false triggering prevention
#16 | 2016-09-20EEPROM memory cell with a coupler region and method of making the same
#17 | 2015-12-31One-time programmable memory cell and circuit
#18 | 2015-06-18Switching circuit and the method thereof
#19 | 2014-07-31Electrostatic discharge protection circuit and method thereof
852634 ⎘