San Jose, California
United States
30
2021-01-05
The entities that hold a legal rights for patent applications filed by inventor White David:
David White from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Clock gate placement with data path awareness
#2 | 2020-04-21Method and system for automatically extracting layout design patterns for custom layout design reuse through interactive recommendations
#3 | 2014-08-21Methods, systems, and articles of manufacture for implementing electronic circuit designs with simulation awareness
#4 | 2014-04-15Methods, systems, and articles of manufactures for implementing electronic circuit designs with IR-drop awareness
#5 | 2013-08-13Method and system for implementing context simulation
#6 | 2012-06-14Robust design using manufacturability models
#7 | 2012-01-26Method, apparatus, and article of manufacture for providing in situ, customizable information in designing electronic circuits with electrical awareness
#8 | 2012-01-26Method, apparatus, and article of manufacture for providing in situ, customizable information in designing electronic circuits with electrical awareness
#9 | 2012-01-26Methods, systems, and articles of manufacture for constraint verification for implementing electronic circuit designs with electrical awareness
#10 | 2012-01-26Methods, systems, and articles of manufacture for implementing electronic circuit designs with electrical awareness
#11 | 2012-01-26Methods, systems, and articles of manufacture for implementing electronic circuit designs with simulation awareness
#12 | 2012-01-26Methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness
#13 | 2011-08-16Method and system for implementing context simulation
#14 | 2011-04-21Method and system for model-based routing of an integrated circuit
#15 | 2011-02-24Method, system, and computer program product for preparing multiple layers of semiconductor substrates for electronic designs
#16 | 2010-05-25System and method for layout optimization using model-based verification
#17 | 2010-04-27System and method for performing verification based upon both rules and models
#18 | 2010-03-30System and method for model-based scoring and yield prediction
#19 | 2009-08-06Method, system, and computer program product for improved electrical analysis
#20 | 2009-01-29Robust design using manufacturability models
#21 | 2008-09-04Electronic design for integrated circuits based on process related variations
#22 | 2008-07-03Method and system for model-based routing of an integrated circuit
#23 | 2008-07-03Method, system, and computer program product for timing closure in electronic designs
#24 | 2008-07-03Method, system, and computer program product for determining three-dimensional feature characteristics in electronic designs
#25 | 2008-07-03Supplant design rules in electronic designs
#26 | 2008-07-03Method, system, and computer program product for preparing multiple layers of semiconductor substrates for electronic designs
#27 | 2008-07-03METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR CONCURRENT MODEL AIDED ELECTRONIC DESIGN AUTOMATION
#28 | 2008-07-03Method, system, and computer program product for predicting thin film integrity, manufacturability, reliability, and performance in electronic designs
#29 | 2008-01-31Method and system for handling process related variations for integrated circuits based upon reflections
#30 | 2007-11-01Dummy fill for integrated circuits
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