Inventor profile of:

Bucknell C. Webb

City:

Ossining, New York

Country:

United States

Published Applications:

48

Last publication date:

2026-02-19

Top Assignees for applications by Bucknell C. Webb

The entities that hold a legal rights for patent applications filed by inventor Webb Bucknell C.:

Recent patent applications by Webb Bucknell C.

Bucknell C. Webb from Ossining, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-02-19
US20260049873A1
Physics

THERMAL ANNEALING CALIBRATION USING MICROFABRICATED RESISTANCE TEMPERATURE SENSORS

#2 | 2025-05-08
US20250148328A1
Physics

LASER ANNEALING QUANTUM DEVICES USING VARIABLE THERMAL PROFILES

#3 | 2021-12-30
US20210408360A1
Electricity

Selective chemical frequency modification of Josephson junction resonators

#4 | 2021-11-11
US20210351043A1
Electricity

Method and apparatus of processor wafer bonding for wafer-scale integrated supercomputer

#5 | 2020-12-24
US20200403190A1
Electricity

Encapsulating in-situ energy storage device with electrode contact

#6 | 2020-12-17
US20200395628A1
Electricity

3D textured composite silicon anode and fluorinated lithium compound electrochemical cell

#7 | 2020-11-10
US16447017
Electricity

Thermalization structure for cryogenic temperature devices

#8 | 2020-07-02
US20200205735A1
Human necessities

Wearable multiplatform sensor

#9 | 2020-05-07
US20200144564A1
Electricity

Low-profile battery construct with engineered interfaces

#10 | 2018-05-17
US20180133152A1
Human necessities

Microchip substance delivery devices

#11 | 2018-03-22
US20180082888A1
Electricity

Wafer level integration including design/co-design, structure process, equipment stress management, and thermal management

#12 | 2018-03-15
US20180076113A1
Electricity

Chip package for two-phase cooling and assembly process thereof

#13 | 2017-09-07
US20170256759A1
Electricity

Low-profile battery construct with engineered interfaces

#14 | 2016-05-12
US20160133281A1
Physics

Magnetic writer having multiple gaps with more uniform magnetic fields across the gaps

#15 | 2016-03-17
US20160074323A1
Human necessities

Microchip substance delivery devices having low-power electromechanical release mechanisms

#16 | 2016-02-18
US20160049344A1
Electricity

Wafer level overmold for three dimensional surfaces

#17 | 2015-10-08
US20150287960A1
Electricity

Thin, flexible microsystem with integrated energy source

#18 | 2015-09-24
US20150270246A1
Electricity

Volumetric integrated circuit and volumetric integrated circuit manufacturing method

#19 | 2015-03-05
US20150064362A1
Electricity

Planar inductors with closed magnetic loops

#20 | 2015-03-05
US20150061815A1
Electricity

PLANAR INDUCTORS WITH CLOSED MAGNETIC LOOPS

#21 | 2014-07-10
US20140190003A1
Electricity

INDUCTOR WITH LAMINATED YOKE

#22 | 2014-05-08
US20140126078A1
Physics

Magnetic writer having multiple gaps with more uniform magnetic fields across the gaps

#23 | 2014-03-06
US20140061853A1
Electricity

Plated lamination structures for integrated magnetic devices

#24 | 2014-01-30
US20140026431A1
Electricity

Underfill material dispensing for stacked semiconductor chips

#25 | 2014-01-16
US20140013606A1
Electricity

Underfill material dispensing for stacked semiconductor chips

#26 | 2013-11-28
US20130314192A1
Electricity

Inductor with stacked conductors

#27 | 2013-07-11
US20130176095A1
Electricity

Inductor with laminated yoke

#28 | 2013-05-16
US20130120872A1
Physics

Magnetic writer having multiple gaps with more uniform magnetic fields across the gaps

#29 | 2013-05-02
US20130106552A1
Electricity

INDUCTOR WITH MULTIPLE POLYMERIC LAYERS

#30 | 2013-04-18
US20130093032A1
Electricity

Semiconductor trench inductors and transformers

#31 | 2013-02-14
US20130039733A1
Electricity

Pick and place tape release for thin semiconductor dies

#32 | 2012-01-24
US12968118
-

Thin film inductor with integrated gaps

#33 | 2011-07-14
US20110171756A1
Electricity

Reworkable electronic device assembly and method

#34 | 2011-05-12
US20110108958A1
Electricity

Metal oxide semiconductor (MOS)-compatible high-aspect ratio through-wafer vias and low-stress configuration thereof

#35 | 2009-01-29
US20090027860A1
Electricity

Cooling device with a preformed compliant interface

#36 | 2008-12-04
US20080298016A1
Electricity

COOLING AN ELECTRONIC DEVICE UTILIZING SPRING ELEMENTS WITH FINS

#37 | 2008-10-30
US20080265428A1
Electricity

VIA AND SOLDER BALL SHAPES TO MAXIMIZE CHIP OR SILICON CARRIER STRENGTH RELATIVE TO THERMAL OR BENDING LOAD ZERO POINT

#38 | 2008-07-17
US20080170370A1
Electricity

Cooling structure using rigid movable elements

#39 | 2008-06-19
US20080144288A1
Electricity

Compliant thermal interface structure utilizing spring elements

#40 | 2008-05-29
US20080122057A1
Electricity

SILICON CARRIER HAVING INCREASED FLEXIBILITY

#41 | 2007-07-05
US20070152346A1
Electricity

Silicon carrier having increased flexibility

#42 | 2006-12-14
US20060279936A1
Electricity

Cooling structure using rigid movable elements

#43 | 2006-12-14
US20060279935A1
Electricity

Compliant thermal interface structure utilizing spring elements

#44 | 2006-12-14
US20060279932A1
Electricity

Compliant thermal interface structure utilizing spring elements with fins

#45 | 2006-12-14
US20060278371A1
Electricity

Compliant thermal interface structure with vapor chamber

#46 | 2006-03-28
US10184343
-

Self-servo-writing multi-slot timing pattern

#47 | 2005-05-19
US20050105200A1
Physics

Method and apparatus for correcting for systematic errors in timing pattern generation

#48 | 2005-01-06
US20050002120A1
Physics

Self-servo-writing multi-slot timing pattern

InventorID:

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