Eugene A. Fitzgerald

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE THEREOF

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Methods for forming semiconductor device structures

Methods of forming strained-semiconductor-on-insulator device structures

METHODS OF FORMING HIGH-EFFICIENCY SOLAR CELL STRUCTURES

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

WATER PURIFICATION AND ENHANCEMENT SYSTEMS

Controlling GaAsP/SiGe interfaces

Methods for forming semiconductor device structures

WATER PURIFICATION AND ENHANCEMENT SYSTEMS

CONTROLLED RELEASE APPARATUS AND USES THEREOF

Monolithic integration of CMOS and non-silicon devices

METHOD AND APPARATUS FOR POINT OF USE WATER FILTRATION

Methods of fabricating contact regions for FET incorporating SiGe

Methods of forming strained-semiconductor-on-insulator device structures

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

High-efficiency solar-cell arrays with integrated devices and methods for forming them

Methods for forming semiconductor device structures

High-efficiency solar-cell arrays with integrated devices and methods for forming them

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Water purification and enhancement systems

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Methods for forming semiconductor device structures

Method of producing high quality relaxed silicon germanium layers

METHODS OF FORMING HIGH-EFFICIENCY MULTI-JUNCTION SOLAR CELL STRUCTURES

HIGH-EFFICIENCY MULTI-JUNCTION SOLAR CELL STRUCTURES

METHODS OF FORMING HIGH-EFFICIENCY MULTI-JUNCTION SOLAR CELL STRUCTURES

III-V semiconductor device structures

DIGITAL METAMORPHIC ALLOYS FOR GRADED BUFFERS

Method of producing high quality relaxed silicon germanium layers

HIGH-EFFICIENCY SOLAR CELL STRUCTURES

METHODS OF FORMING HIGH-EFFICIENCY SOLAR CELL STRUCTURES

Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETS

Monolithically integrated photodetectors

Tensile strained GE for electronic and optoelectronic applications

Relaxed SiGe platform for high speed CMOS electronics and high speed analog circuits

Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission

Methods for forming III-V semiconductor device structures

Structure and method for a high-speed semiconductor device having a Ge channel layer

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

FinFET structure and method to make the same

Structure and method for a high-speed semiconductor device having a Ge channel layer

Insulated gate devices and method of making same

Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization

Etch stop layer system

Monolithically integrated silicon and III-V electronics

Monolithically integrated semiconductor materials and devices

Monolithically integrated light emitting devices

Gate technology for strained surface channel and strained buried channel MOSFET devices

Structures with planar strained layers

Methods of fabricating semiconductor devices having strained dual channel layers

Electro-absorption modulator device and methods for fabricating the same

Method of fabricating CMOS inverters and integrated circuits utilizing strained surface channel MOSFETs

Methods for forming semiconductor structures with differential surface layer thicknesses

Structures with planar strained layers

Semiconductor devices having strained dual channel layers

Dual-channel CMOS transistors with differentially strained channels

Methods for forming structures including strained-semiconductor-on-insulator devices

Methods for forming double gate strained-semiconductor-on-insulator device structures

Double gate strained-semiconductor-on-insulator device structures

Methods for forming strained-semiconductor-on-insulator bipolar device structures

Methods of fabricating contact regions for FET incorporating SiGe

Strained-semiconductor-on-insulator bipolar device structures

Method of producing high quality relaxed silicon germanium layers

Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization

Methods of forming strained-semiconductor-on-insulator finFET device structures

Method for forming low defect density alloy graded layers and structure containing such layers

Method of producing high quality relaxed silicon germanium layers

Strained gettering layers for semiconductor processes

Method for improving hole mobility enhancement in strained silicon p-type MOSFETS

Strained-semiconductor-on-insulator device structures

Methods of fabricating strained-channel FET having a dopant supply region

Yellow-green epitaxial transparent substrate-LEDs and lasers based on a strained-InGaP quantum well grown on an indirect bandgap substrate

Strained-semiconductor-on-insulator finFET device structures

Semiconductor devices having bonded interfaces and methods for making the same

Strained silicon-on-silicon by wafer bonding and layer transfer

Strained tri-channel layer for semiconductor-based electronic devices

Dual layer Semiconductor Devices

Buried channel strained silicon FET using a supply layer created through ion implantation

Methods of fabricating dual layer semiconductor devices

Strained-semiconductor-on-insulator device structures with elevated source/drain regions

Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes

Strained germanium-on-insulator device structures

Gate technology for strained surface channel and strained buried channel MOSFET devices

Method of forming a digitalized semiconductor structure

Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain

Semiconductor device structure

Strained-semiconductor-on-insulator device structures

Coplanar integration of lattice-mismatched semiconductor with silicon via wafer bonding virtual substrates

Process for producing semiconductor article using graded epitaxial growth

Methods of forming strained-semiconductor-on-insulator device structures

Enhancement of p-type metal-oxide-semiconductor field effect transistors

Enhancement of P-type metal-oxide-semiconductor field effect transistors

Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers

Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits

Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETs

Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS

Relaxed SiGe platform for high speed CMOS electronics and high speed analog circuits

Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization