Inventor profile of:

Mark David Werkheiser

City:

Austin, Texas

Country:

United States

Published Applications:

32

Last publication date:

2026-04-30

Top Assignees for applications by Mark David Werkheiser

The entities that hold a legal rights for patent applications filed by inventor Werkheiser Mark David:

Recent patent applications by Werkheiser Mark David

Mark David Werkheiser from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-30
US20260119401A1
Physics

DCT MECHANISM FOR THE MULTI-CHIP SYSTEMS

#2 | 2025-06-05
US20250181271A1
Physics

TRANSACTION REQUESTS ACCORDING TO A REQUEST ORDERING PROTOCOL

#3 | 2024-08-15
US20240273026A1
Physics

System Level Cache with Configurable Partitioning

#4 | 2024-08-15
US20240273025A1
Physics

Data Processing Network with Super Home Node

#5 | 2023-07-13
US20230221866A1
Physics

AN APPARATUS AND METHOD FOR HANDLING MEMORY ACCESS REQUESTS

#6 | 2023-02-02
US20230029897A1
Physics

Methods and apparatus for communicating between node devices

#7 | 2022-11-03
US20220350771A1
Physics

CCIX port management for PCI express traffic

#8 | 2022-09-29
US20220308997A1
Physics

Distributed virtual memory management for data processing network

#9 | 2022-05-26
US20220164288A1
Physics

Configurable cache coherency controller

#10 | 2021-07-15
US20210216241A1
Physics

Write operation status

#11 | 2021-05-20
US20210149833A1
Physics

Apparatus and method for handling ordered transactions

#12 | 2021-04-08
US20210103460A1
Physics

Writing zero data

#13 | 2020-09-24
US20200301854A1
Physics

System, method and apparatus for accessing shared memory

#14 | 2020-08-13
US20200257647A1
Physics

System, method and apparatus for enabling partial data transfers with indicators

#15 | 2020-07-30
US20200241589A1
Physics

Clock circuitry with fault detection

#16 | 2020-06-30
US16299291
Physics

Inter-chip communication in a multi-chip system

#17 | 2020-05-28
US20200167284A1
Physics

Apparatus and method for processing an ownership upgrade request for cached data that is issued in relation to a conditional store operation

#18 | 2020-05-19
US16218962
Physics

Apparatus and method for managing snoop operations

#19 | 2020-03-10
US16248456
Physics

Clock circuitry for functionally safe systems

#20 | 2019-10-22
US16055211
Physics

System, method and apparatus for ordering logic

#21 | 2019-03-14
US20190079868A1
Physics

Snoop filter for cache coherency in a data processing system

#22 | 2019-03-07
US20190073324A1
Physics

Dynamic adaptation of direct memory transfer in a data processing system with mismatched data-bus widths

#23 | 2018-08-09
US20180225209A1
Physics

Read-with overridable-invalidate transaction

#24 | 2018-01-04
US20180004663A1
Physics

Progressive fine to coarse grain snoop filter

#25 | 2017-06-15
US20170168939A1
Physics

Snoop filter for cache coherency in a data processing system

#26 | 2017-06-15
US20170168548A1
Physics

Segregated power state control in a distributed cache system

#27 | 2016-03-03
US20160062890A1
Physics

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

#28 | 2016-03-03
US20160062889A1
Physics

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

#29 | 2013-02-14
US20130042252A1
Physics

Processing resource allocation within an integrated circuit

#30 | 2013-02-14
US20130042249A1
Electricity

Processing resource allocation within an integrated circuit supporting transaction requests of different priority levels

#31 | 2013-02-14
US20130042078A1
Physics

Snoop filter and non-inclusive shared cache memory

#32 | 2013-02-14
US20130042070A1
Physics

Apparatus and method for shared cache control including cache lines selectively operable in inclusive or non-inclusive mode

InventorID:

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