Volker BAUMGARTE

Array Processor Having a Segmented Bus System

Array Processor Having a Segmented Bus System

Methods and devices for treating and processing data

Method of transferring data between external devices and an array processor

Array processor having a segmented bus system

Integrated data processing core and array data processor and method for processing algorithms

Data processor chip with flexible bus system

Methods and systems for transferring data between a processing device and external devices

Data processing system having integrated pipelined array data processor

Parallel Processing Array of Arithmetic Unit having a Barrier Instruction

Method of processing data with an array of data processors according to application ID

Logical cell array and bus system

PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION

Multi-processor bus and cache interconnection system

Multiprocessor having runtime adjustable clock and clock dependent power supply

Methods and devices for treating and processing data

Pipeline configuration protocol and configuration unit communication

Logic cell array and bus system

RECONFIGURABLE FLOATING-POINT AND BIT-LEVEL DATA PROCESSING UNIT

Data processing method and device

Methods and devices for treating and processing data

Logic cell array and bus system

Logic cell array and bus system

Methods and devices for treating and processing data

Method and Device for Treating and Processing Data

Data processing method and device

Pipeline configuration unit protocols and communication

Pipeline configuration protocol and configuration unit communication

Methods and devices for treating and processing data