San Diego, California
United States
28
2020-03-26
The entities that hold a legal rights for patent applications filed by inventor CHUN Dexter:
Dexter CHUN from San Diego, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Selective volatile memory refresh via memory-side data valid indication
#2 | 2019-06-13System and method for online functional testing for error-correcting code function
#3 | 2019-02-28System and method for booting within a heterogeneous memory environment
#4 | 2019-02-28Systems and methods for memory power saving via kernel steering to memory balloons
#5 | 2019-01-03Systems and methods for improved error correction in a refreshable memory
#6 | 2018-12-27Bandwidth-monitored frequency hopping within a selected DRAM operating point
#7 | 2018-11-22SYSTEMS AND METHODS FOR REDUCING MEMORY POWER CONSUMPTION VIA DEVICE-SPECIFIC CUSTOMIZATION OF DDR INTERFACE PARAMETERS
#8 | 2018-10-04Systems and methods for reducing memory power consumption via pre-filled DRAM values
#9 | 2018-09-13Systems and methods for providing power-efficient file system operation to a non-volatile block memory
#10 | 2018-07-12Coincident memory bank access via cross connected shared bank resources
#11 | 2018-07-05Non-volatile random access memory with gated security access
#12 | 2018-02-22Low power data transfer for memory subsystem using data pattern checker to determine when to suppress transfers based on specific patterns
#13 | 2017-12-28Preemptive decompression scheduling for a NAND storage device
#14 | 2017-12-28SELECTIVE FLASH MEMORY COMPRESSION/DECOMPRESSION USING A STORAGE USAGE COLLAR
#15 | 2017-10-03Systems, methods, and computer programs for providing row tamper protection in a multi-bank memory cell array
#16 | 2017-08-03Flash device lifetime monitor systems and methods
#17 | 2015-10-22SYSTEM AND METHOD FOR DEEP COALESCING MEMORY MANAGEMENT IN A PORTABLE COMPUTING DEVICE
#18 | 2015-05-21Method and apparatus for multiple-bit DRAM error recovery
#19 | 2015-05-14System and method for reducing memory I/O power via data masking
#20 | 2015-05-07Method and apparatus for non-volatile RAM error re-mapping
#21 | 2015-04-30SYSTEM AND METHOD FOR PROVIDING MULTI-USER POWER SAVING CODEBOOK OPTMIZATION
#22 | 2015-04-30System and method for conserving power consumption in a memory system
#23 | 2015-03-26System and method for conserving memory power using dynamic memory I/O resizing
#24 | 2015-02-12System and method for memory channel interleaving with selective power or performance optimization
#25 | 2014-11-20Methods and systems for smart refresh of dynamic random access memory
#26 | 2007-09-11Robust radio base station controller architecture
#27 | 2006-08-15Timing distribution redundacy in a wireless network
#28 | 2005-05-24Systems and methods for controlling audible speech distortion in a GPS-based CDMA wireless network using ATM transport
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