STMicroelectronics PVT. LTD.

Linearly scalable finite impulse response filter

Method for calibration of an oscillator for a microcontroller chip operation

Video decoder incorporating reverse variable length decoding

Input buffer for CMOS integrated circuits

Configurable memory architecture with built-in testing mechanism

Apparatus for enabling duty cycle locking at the rising/falling edge of the clock

Low noise output buffer capable of operating at high speeds

Temperature compensated reference current generator

Polarity independent precision measurement of an input voltage signal

Digital delay lock loop

Interconnect structure enabling indirect routing in programmable logic

Timing skew measurement system

Glitch free controlled ring oscillator and associated methods

Method and apparatus for multiplexing an integrated circuit pin

FPGA having a direct routing structure

PWM generator providing improved duty cycle resolution

Logic entity with two outputs for efficient adder and other macro implementations

Logic device with reduced leakage current

Differential receiver

High-voltage tolerant input buffer circuit

Voltage translator having minimized power dissipation

Content addressable memory cell architecture

Optimal mapping of LUT based FPGA

Transceiver providing high speed transmission signal using shared resources and reduced area

LCD driver with adjustable contrast

Method and device for configuration of PLDs

CMOS to PECL voltage level converter

FPGA peripheral routing with symmetric edge termination at FPGA boundaries