Munich
Germany
31
2008-03-18
31
2008-03-18
These are the the leading inventors for applications assigned to Infineon Technologies Aktiengesellschaft:
Infineon Technologies Aktiengesellschaft based in Munich, DE has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
High performance architecture with shared memory
#2 | 2008-02-19 ✅ Patent 7,333,388 granted on 2008-02-19Multi-port memory cells
#3 | 2007-08-09 ✅ Patent 7,486,723 granted on 2009-02-03Asymmetrical digital subscriber line system with improved data rate
#4 | 2007-03-06 ✅ Patent 7,187,602 granted on 2007-03-06Reducing memory failures in integrated circuits
#5 | 2007-01-30 ✅ Patent 7,170,173 granted on 2007-01-30Magnetically lined conductors
#6 | 2006-07-18 ✅ Patent 7,080,184 granted on 2006-07-18ISDN-based bus interface
#7 | 2006-03-07 ✅ Patent 7,009,230 granted on 2006-03-07Barrier stack with improved barrier properties
#8 | 2006-02-21 ✅ Patent 7,002,867 granted on 2006-02-21Refresh control circuit for ICs with a memory array
#9 | 2005-12-06 ✅ Patent 6,972,983 granted on 2005-12-06Increasing the read signal in ferroelectric memories
#10 | 2005-10-11 ✅ Patent 6,954,873 granted on 2005-10-11Implementation of wait-states
#11 | 2005-09-06 ✅ Patent 6,940,111 granted on 2005-09-06Radiation protection in integrated circuits
#12 | 2005-08-30 ✅ Patent 6,936,856 granted on 2005-08-30Multi substrate organic light emitting devices
#13 | 2005-08-23 ✅ Patent 6,934,205 granted on 2005-08-23Bist for parallel testing of on chip memory
#14 | 2005-08-23 ✅ Patent 6,933,549 granted on 2005-08-23Barrier material
#15 | 2005-07-21 ✅ Patent 7,157,329 granted on 2007-01-02Trench capacitor with buried strap
#16 | 2005-07-19 ✅ Patent 6,920,059 granted on 2005-07-19Reducing effects of noise coupling in integrated circuits with memory arrays
#17 | 2005-06-14 ✅ Patent 6,906,969 granted on 2005-06-14Hybrid fuses for redundancy
#18 | 2005-06-07 ✅ Patent 6,903,959 granted on 2005-06-07Sensing of memory integrated circuits
#19 | 2005-05-24 ✅ Patent 6,897,501 granted on 2005-05-24Avoiding shorting in capacitors
#20 | 2005-05-17 ✅ Patent 6,893,911 granted on 2005-05-17Process integration for integrated circuits
#21 | 2005-05-10 ✅ Patent 6,891,713 granted on 2005-05-10Element storage layer in integrated circuits
#22 | 2005-05-03 ✅ Patent 6,888,260 granted on 2005-05-03Alignment or overlay marks for semiconductor processing
#23 | 2005-04-26 ✅ Patent 6,885,597 granted on 2005-04-26Sensing test circuit
#24 | 2005-03-29 ✅ Patent 6,873,003 granted on 2005-03-29Nonvolatile memory cell
#25 | 2005-02-22 ✅ Patent 6,858,442 granted on 2005-02-22Ferroelectric memory integrated circuit with improved reliability
#26 | 2005-02-22 ✅ Patent 6,858,890 granted on 2005-02-22Ferroelectric memory integrated circuit with improved reliability
#27 | 2005-02-15 ✅ Patent 6,856,560 granted on 2005-02-15Redundancy in series grouped memory architecture
#28 | 2005-02-08 ✅ Patent 6,853,025 granted on 2005-02-08Trench capacitor with buried strap
#29 | 2005-02-08 ✅ Patent 6,853,597 granted on 2005-02-08Integrated circuits with parallel self-testing
#30 | 2005-02-01 ✅ Patent 6,850,451 granted on 2005-02-01Zero static power fuse for integrated circuits
#31 | 2005-01-04 ✅ Patent 6,839,298 granted on 2005-01-04Zero static power fuse cell for integrated circuits
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