Cadence Design Systems

City:

San Jose, California

Country:

United States

Published Applications:

Last publication date:

2009-04-23

Patent Grants:

Last grant date:

2012-04-03

Top Inventors for applications by Cadence Design Systems

These are the the leading inventors for applications assigned to Cadence Design Systems:

William Evans 1 Catonsville, MD United States
Stephen Williams 1 Baltimore, MD United States
Vikas KOHLI 1 Noida, India
Eric Naviasky 1 Ellicott City, MD United States

Asmus Hetzel 1 Berlin, Germany
Steven Teig 1 Menlo Park, CA United States

Recent patent applications by Cadence Design Systems

Cadence Design Systems based in San Jose, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2009-04-23 ✅ Patent 8,151,227 granted on 2012-04-03

US20090106710A1

Physics

Method and apparatus for pre-tabulating sub-networks

#2 | 2008-08-26 ✅ Patent 7,417,572 granted on 2008-08-26

US11645519

Voltage interpolation in digital-to-analog signal conversion

#3 | 2006-11-28 ✅ Patent 7,143,341 granted on 2006-11-28

US10176903

Method and apparatus for concurrent engineering and design synchronization of multiple tools

Also check out Cadence Design Systems' (San Jose, United States) applicant profile with 1 patent applications submitted.

AssigneeID:

450671 ⎘