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Inventor profile of:

Asmus Hetzel

City:

Berlin

Country:

Germany

Published Applications:

Last publication date:

2018-10-18

Top Assignees for applications by Asmus Hetzel

The entities that hold a legal rights for patent applications filed by inventor Hetzel Asmus:

Cadence Design Systems, Inc. 24 San Jose, CA United States
Cadence Design Systems 1 San Jose, CA United States
Wave Computing, Inc. 1 Campbell, CA United States

Recent patent applications by Hetzel Asmus

Asmus Hetzel from Berlin, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2018-10-18

US20180300181A1

Physics

Reconfigurable processor fabric implementation using satisfiability analysis

#2 | 2010-09-21

US11478290

Watermarking a chip design based on frequency of geometric structures

#3 | 2010-07-15

US20100180250A1

Physics

Method and apparatus for generating layout regions with local preferred directions

#4 | 2009-04-23

US20090106710A1

Physics

Method and apparatus for pre-tabulating sub-networks

#5 | 2009-04-02

US20090089735A1

Physics

Method and apparatus for routing

#6 | 2009-01-22

US20090024977A1

Physics

Local preferred direction architecture

#7 | 2008-12-30

US11195335

Method and apparatus for performing a path search

#8 | 2008-07-08

US10062017

Method and apparatus for pre-tabulating sub-networks

#9 | 2008-06-03

US10061474

Structure for storing a plurality of sub-networks

#10 | 2007-06-14

US20070136713A1

Physics

Method and apparatus for routing

#11 | 2007-03-27

US10751332

Method and apparatus for routing

#12 | 2006-11-02

US20060248492A1

Physics

Block interstitching using local preferred direction architectures, tools, and apparatus

#13 | 2006-08-29

US10062014

Method and apparatus for pre-tabulating sub-networks

#14 | 2006-07-11

US10066188

Method and apparatus for specifying encoded sub-networks

#15 | 2006-04-04

US10066264

Method and apparatus for specifying encoded sub-networks

#16 | 2006-01-24

US10061719

Method and apparatus for performing technology mapping

#17 | 2005-12-08

US20050273748A1

Physics

Method and apparatus for local preferred direction routing

#18 | 2005-12-08

US20050273747A1

Physics

Local preferred direction routing

#19 | 2005-12-08

US20050273746A1

Physics

Method and apparatus for generating layout regions with local preferred directions

#20 | 2005-10-13

US20050229134A1

Physics

Local preferred direction architecture, tools, and apparatus

#21 | 2005-10-11

US10061459

Method and apparatus for producing a circuit description of a design

#22 | 2005-07-28

US20050165595A1

Physics

Method and apparatus replacing sub-networks within an IC design

#23 | 2005-02-15

US10062044

Method and apparatus for producing a circuit description of a design

#24 | 2005-02-08

US10062993

Method and apparatus for performing technology mapping

#25 | 2005-02-08

US10062047

Method and apparatus for performing technology mapping

#26 | 2005-01-25

US10066456

Method and apparatus for performing technology mapping

InventorID:

2326161 ⎘