Assignee profile:

EASIC CORPORATION

City:

Santa Clara, California

Country:

United States

Published Applications:

24

Last publication date:

2017-06-15

Patent Grants:

19

Last grant date:

2017-07-11

Top Inventors for applications by EASIC CORPORATION

These are the the leading inventors for applications assigned to EASIC CORPORATION:

Recent patent applications by EASIC CORPORATION

EASIC CORPORATION based in Santa Clara, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2017-06-15 ✅ Patent 9,704,874 granted on 2017-07-11
US20170170186A1
Electricity

ROM segmented bitline circuit

#2 | 2014-04-17
US20140105246A1
Physics

Temperature Controlled Structured ASIC Manufactured on a 28 NM CMOS Process Lithographic Node

#3 | 2014-04-17
US20140103985A1
Electricity

Digitally Controlled Delay Line for a Structured ASIC Having a Via Configurable Fabric for High-Speed Interface

#4 | 2014-04-17 ✅ Patent 9,024,657 granted on 2015-05-05
US20140103959A1
Electricity

Architectural floorplan for a structured ASIC manufactured on a 28 NM CMOS process lithographic node or smaller

#5 | 2014-03-18 ✅ Patent 8,677,306 granted on 2014-03-18
US13649551
-

Microcontroller controlled or direct mode controlled network-fabric on a structured ASIC

#6 | 2014-01-30 ✅ Patent 8,957,398 granted on 2015-02-17
US20140028348A1
Electricity

Via-configurable high-performance logic block involving transistor chains

#7 | 2012-09-27 ✅ Patent 8,848,479 granted on 2014-09-30
US20120243285A1
Physics

Multiple write during simultaneous memory access of a multi-port memory device

#8 | 2012-06-28 ✅ Patent 8,735,857 granted on 2014-05-27
US20120161093A1
Electricity

Via-configurable high-performance logic block architecture

#9 | 2011-03-24 ✅ Patent 8,436,700 granted on 2013-05-07
US20110067982A1
Electricity

MEMS-based switching

#10 | 2010-08-05 ✅ Patent 8,040,739 granted on 2011-10-18
US20100195419A1
Physics

Configurable write policy in a memory system

#11 | 2010-07-22
US20100182044A1
Electricity

PROGRAMMING AND CIRCUIT TOPOLOGIES FOR PROGRAMMABLE VIAS

#12 | 2009-04-30 ✅ Patent 7,759,971 granted on 2010-07-20
US20090109765A1
Physics

Single via structured IC device

#13 | 2008-10-23 ✅ Patent 8,504,865 granted on 2013-08-06
US20080263381A1
Electricity

Dynamic phase alignment

#14 | 2008-09-18 ✅ Patent 8,339,844 granted on 2012-12-25
US20080224260A1
Electricity

Programmable vias for structured ASICs

#15 | 2007-08-16 ✅ Patent 7,463,062 granted on 2008-12-09
US20070188188A1
Electricity

Structured integrated circuit device

#16 | 2007-08-16
US20070187808A1
Electricity

Customizable power and ground pins

#17 | 2007-07-26 ✅ Patent 7,689,960 granted on 2010-03-30
US20070174801A1
Physics

Programmable via modeling

#18 | 2006-09-12 ✅ Patent 7,105,871 granted on 2006-09-12
US10730064
-

Semiconductor device

#19 | 2006-08-10
US20060176075A1
Electricity

Customizable and Programmable Cell Array

#20 | 2006-07-27 ✅ Patent 7,550,996 granted on 2009-06-23
US20060164121A1
Electricity

Structured integrated circuit device

#21 | 2006-06-29 ✅ Patent 7,514,959 granted on 2009-04-07
US20060139057A1
Electricity

Structured integrated circuit device

#22 | 2006-02-09 ✅ Patent 7,068,070 granted on 2006-06-27
US20060028242A1
Electricity

Customizable and programmable cell array

#23 | 2006-02-09 ✅ Patent 7,157,937 granted on 2007-01-02
US20060028241A1
Electricity

Structured integrated circuit device

#24 | 2006-02-02 ✅ Patent 7,098,691 granted on 2006-08-29
US20060022705A1
Electricity

Structured integrated circuit device

Also check out eASIC Corporation's (Santa Clara, United States) applicant profile with 4 patent applications submitted.

AssigneeID:

53183 ⎘