Sunnyvale, California
United States
126
2025-02-13
124
2026-06-02
These are the the leading inventors for applications assigned to GSI Technology Inc.:
GSI Technology Inc. based in Sunnyvale, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
RESPONDER SIGNAL CIRCUITRY FOR MEMORY ARRAYS
#2 | 2024-06-20 ✅ Patent 12,079,478 granted on 2024-09-03System and method for random data distribution in a memory array
#3 | 2024-06-13 ✅ Patent 12,423,112 granted on 2025-09-23PIPELINE ARCHITECTURE FOR BITWISE MULTIPLIER-ACCUMULATOR (MAC)
#4 | 2024-04-11 ✅ Patent 12,210,539 granted on 2025-01-28One by one selection of items of a set
#5 | 2024-04-11 ✅ Patent 12,159,123 granted on 2024-12-03Method to compare between a first number and a second number
#6 | 2023-11-09 ✅ Patent 12,008,068 granted on 2024-06-11In memory matrix multiplication and its usage in neural networks
#7 | 2023-10-05 ✅ Patent 12,131,779 granted on 2024-10-29Global responder signal circuitry for memory arrays
#8 | 2023-08-31 ✅ Patent 12,135,725 granted on 2024-11-05Efficient similarity search
#9 | 2023-08-24 ✅ Patent 11,755,240 granted on 2023-09-12Concurrent multi-bit subtraction in associative memory
#10 | 2023-07-13 ✅ Patent 12,106,071 granted on 2024-10-01Square root calculations on an associative processing unit
#11 | 2023-03-23 ✅ Patent 11,763,136 granted on 2023-09-19Neural hashing for similarity search
#12 | 2023-03-23 ✅ Patent 11,989,185 granted on 2024-05-21In-memory efficient multistep search
#13 | 2022-12-29 ✅ Patent 12,596,529 granted on 2026-04-07CORDIC COMPUTATION OF SIN/COS USING COMBINED APPROACH IN ASSOCIATIVE MEMORY
#14 | 2022-11-24 ✅ Patent 12,488,002 granted on 2025-12-02ASSOCIATIVE GRAPH SEARCH
#15 | 2022-10-27 ✅ Patent 11,991,290 granted on 2024-05-21Associative hash tree
#16 | 2022-10-06 ✅ Patent 12,475,777 granted on 2025-11-18N-GRAM BASED CLASSIFICATION WITH ASSOCIATIVE PROCESSING UNIT
#17 | 2022-09-22 ✅ Patent 12,650,814 granted on 2026-06-09RAM TRUE RANDOM NUMBER GENERATOR
#18 | 2022-04-07 ✅ Patent 12,027,238 granted on 2024-07-02Functional protein classification for pandemic research
#19 | 2022-01-18 ✅ Patent 11,227,653 granted on 2022-01-18Storage array circuits and methods for computational memory cells
#20 | 2021-12-21 ✅ Patent 11,205,476 granted on 2021-12-21Read data processing circuits and methods associated with computational memory cells
#21 | 2021-11-18 ✅ Patent 12,387,002 granted on 2025-08-12SECURE SIMILARITY SEARCH FOR SENSITIVE DATA
#22 | 2021-11-11 ✅ Patent 11,670,369 granted on 2023-06-06Memory device for determining an extreme value
#23 | 2021-10-28 ✅ Patent 12,322,121 granted on 2025-06-03Satellite imagery
#24 | 2021-09-23 ✅ Patent 11,645,292 granted on 2023-05-09Efficient similarity search
#25 | 2021-08-26 ✅ Patent 12,050,885 granted on 2024-07-30Iterative binary division with carry prediction
#26 | 2021-07-22 ✅ Patent 11,763,881 granted on 2023-09-19Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
#27 | 2021-07-22COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING THE MEMORY CELLS FOR XOR AND XNOR COMPUTATIONS
#28 | 2021-07-15RESULTS PROCESSING CIRCUITS AND METHODS ASSOCIATED WITH COMPUTATIONAL MEMORY CELLS
#29 | 2021-07-08 ✅ Patent 11,734,385 granted on 2023-08-22In memory matrix multiplication and its usage in neural networks
#30 | 2021-06-17 ✅ Patent 11,860,885 granted on 2024-01-02One by one selection of items of a set
#31 | 2021-06-10 ✅ Patent 11,409,528 granted on 2022-08-09Orthogonal data transposition system and method during data transfers to/from a processing array
#32 | 2021-03-18 ✅ Patent 11,681,497 granted on 2023-06-20Concurrent multi-bit adder
#33 | 2021-02-25 ✅ Patent 12,259,859 granted on 2025-03-25Deduplication of data via associative similarity search
#34 | 2021-01-28 ✅ Patent 11,257,540 granted on 2022-02-22Write data processing methods associated with computational memory cells
#35 | 2021-01-28 ✅ Patent 11,194,548 granted on 2021-12-07Processing array device that performs one cycle full adder operation and bit line read/write logic features
#36 | 2021-01-14 ✅ Patent 12,210,537 granted on 2025-01-28Reference distance similarity search
#37 | 2021-01-12 ✅ Patent 10,891,076 granted on 2021-01-12Results processing circuits and methods associated with computational memory cells
#38 | 2021-01-07 ✅ Patent 10,922,169 granted on 2021-02-16Error detecting memory device
#39 | 2020-12-29 ✅ Patent 10,877,731 granted on 2020-12-29Processing array device that performs one cycle full adder operation and bit line read/write logic features
#40 | 2020-12-24 ✅ Patent 10,958,272 granted on 2021-03-23Computational memory cell and processing array device using complementary exclusive or memory cells
#41 | 2020-12-08 ✅ Patent 10,860,320 granted on 2020-12-08Orthogonal data transposition system and method during data transfers to/from a processing array
#42 | 2020-12-01 ✅ Patent 10,854,284 granted on 2020-12-01Computational memory cell and processing array device with ratioless write port
#43 | 2020-11-26 ✅ Patent 11,941,407 granted on 2024-03-26Pipeline architecture for bitwise multiplier-accumulator (MAC)
#44 | 2020-11-24 ✅ Patent 10,847,213 granted on 2020-11-24Write data processing circuits and methods associated with computational memory cells
#45 | 2020-11-24 ✅ Patent 10,847,212 granted on 2020-11-24Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers
#46 | 2020-11-19 ✅ Patent 11,520,791 granted on 2022-12-06In-memory efficient multistep search
#47 | 2020-09-24 ✅ Patent 11,150,903 granted on 2021-10-19Computational memory cell and processing array device using memory cells
#48 | 2020-09-15 ✅ Patent 10,777,262 granted on 2020-09-15Read data processing circuits and methods associated memory cells
#49 | 2020-06-18 ✅ Patent 10,817,370 granted on 2020-10-27Self correcting memory device
#50 | 2020-05-28 ✅ Patent 10,891,991 granted on 2021-01-12Massively parallel, associative multiplier accumulator
#51 | 2020-05-19 ✅ Patent 10,659,058 granted on 2020-05-19Systems and methods involving lock loop circuits, distributed duty cycle correction loop circuitry
#52 | 2020-05-14 ✅ Patent 11,604,850 granted on 2023-03-14In-memory full adder
#53 | 2020-04-16 ✅ Patent 10,942,736 granted on 2021-03-09Method for min-max computation in associative memory
#54 | 2020-04-16 ✅ Patent 11,194,519 granted on 2021-12-07Results processing circuits and methods associated with computational memory cells
#55 | 2020-03-26 ✅ Patent 10,846,365 granted on 2020-11-24Sparse matrix multiplication in associative memory device
#56 | 2020-01-09 ✅ Patent 10,803,141 granted on 2020-10-13In-memory stochastic rounder
#57 | 2019-12-19 ✅ Patent 10,824,394 granted on 2020-11-03Concurrent multi-bit adder
#58 | 2019-09-12 ✅ Patent 10,635,397 granted on 2020-04-28System and method for long addition and long multiplication in associative memory
#59 | 2019-04-18 ✅ Patent 10,949,766 granted on 2021-03-16Precise exponent and exact softmax computation
#60 | 2019-02-28 ✅ Patent 10,956,432 granted on 2021-03-23One by one selection of items of a set
#61 | 2019-02-28 ✅ Patent 10,514,914 granted on 2019-12-24Method for min-max computation in associative memory
#62 | 2019-02-28 ✅ Patent 10,402,165 granted on 2019-09-03Concurrent multi-bit adder
#63 | 2018-11-29 ✅ Patent 12,073,328 granted on 2024-08-27Integrating a memory layer in a neural network for one-shot learning
#64 | 2018-11-29 ✅ Patent 12,367,346 granted on 2025-07-22NATURAL LANGUAGE PROCESSING WITH KNN
#65 | 2018-08-02 ✅ Patent 10,535,381 granted on 2020-01-14Systems and methods of pipelined output latching involving synchronous memory arrays
#66 | 2018-07-26 ✅ Patent 10,489,480 granted on 2019-11-26Sparse matrix multiplication in associative memory device
#67 | 2018-06-07 ✅ Patent 10,249,362 granted on 2019-04-02Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
#68 | 2018-06-07 ✅ Patent 10,998,040 granted on 2021-05-04Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
#69 | 2018-06-07 ✅ Patent 10,817,292 granted on 2020-10-27Computational memory cell and processing array device using memory cells
#70 | 2018-06-07 ✅ Patent 10,725,777 granted on 2020-07-28Computational memory cell and processing array device using memory cells
#71 | 2018-06-07 ✅ Patent 10,534,836 granted on 2020-01-14Four steps associative full adder
#72 | 2018-06-07 ✅ Patent 10,521,229 granted on 2019-12-31Computational memory cell and processing array device using memory cells
#73 | 2018-05-03 ✅ Patent 10,210,935 granted on 2019-02-19Associative row decoder
#74 | 2018-04-26 ✅ Patent 11,074,973 granted on 2021-07-27Responder signal circuitry for memory arrays finding at least one cell with a predefined value
#75 | 2018-04-19 ✅ Patent 10,425,070 granted on 2019-09-24Systems and methods involving lock-loop circuits, clock signal alignment, phase-averaging feedback clock circuitry
#76 | 2018-03-01 ✅ Patent 10,599,443 granted on 2020-03-24Systems and methods involving control-I/O buffer enable circuits and/or features of saving power in standby mode
#77 | 2018-01-18 ✅ Patent 10,929,751 granted on 2021-02-23Finding K extreme values in constant processing time
#78 | 2017-12-26 ✅ Patent 9,853,633 granted on 2017-12-26Systems and methods involving lock-loop circuits, clock signal alignment, phase-averaging feedback clock circuitry
#79 | 2017-11-02 ✅ Patent 10,153,042 granted on 2018-12-11In-memory computational device with bit line processors
#80 | 2017-09-28 ✅ Patent 10,997,275 granted on 2021-05-04In memory matrix multiplication and its usage in neural networks
#81 | 2017-08-08 ✅ Patent 9,729,159 granted on 2017-08-08Systems and methods of phase-locked loop involving closed-loop, continuous frequency range, auto calibration and/or other features
#82 | 2017-08-01 ✅ Patent 9,722,618 granted on 2017-08-01Systems and methods of phase-locked loop involving closed-loop, continuous frequency range, auto calibration and/or other features
#83 | 2017-06-27 ✅ Patent 9,692,429 granted on 2017-06-27Systems and methods involving fast-acquisition lock features associated with phase locked loop circuitry
#84 | 2017-06-08 ✅ Patent 9,859,902 granted on 2018-01-02Systems and method involving fast-acquisition lock features associated with phase locked loop circuitry
#85 | 2017-05-04 ✅ Patent 9,966,118 granted on 2018-05-08Systems and methods of pipelined output latching involving synchronous memory arrays
#86 | 2017-03-28 ✅ Patent 9,608,651 granted on 2017-03-28Systems and methods of phase-locked loop involving closed-loop, continuous frequency range, auto calibration and/or other features
#87 | 2017-03-02 ✅ Patent 9,935,635 granted on 2018-04-03Systems and methods involving pseudo complementary output buffer circuitry/schemes, power noise reduction and/or other features
#88 | 2016-12-15 ✅ Patent 10,303,629 granted on 2019-05-28Systems and methods involving data bus inversion memory circuitry, configuration(s) and/or operation
#89 | 2016-11-29 ✅ Patent 9,509,296 granted on 2016-11-29Systems and methods of phase frequency detection involving features such as improved clock edge handling circuitry/aspects
#90 | 2016-11-24 ✅ Patent 9,853,634 granted on 2017-12-26Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features
#91 | 2016-11-24 ✅ Patent 9,847,111 granted on 2017-12-19Systems and methods of pipelined output latching involving synchronous memory arrays
#92 | 2016-11-15 ✅ Patent 9,494,647 granted on 2016-11-15Systems and methods involving data inversion devices, circuitry, schemes and/or related aspects
#93 | 2016-11-10 ✅ Patent 9,558,812 granted on 2017-01-31SRAM multi-cell operations
#94 | 2016-11-03 ✅ Patent 9,653,166 granted on 2017-05-16In-memory computational device
#95 | 2016-11-01 ✅ Patent 9,484,076 granted on 2016-11-01Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features
#96 | 2016-10-06 ✅ Patent 10,192,592 granted on 2019-01-29Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features
#97 | 2016-08-30 ✅ Patent 9,431,079 granted on 2016-08-30Systems and methods of memory and memory operation involving input latching, self-timing and/or other features
#98 | 2016-08-09 ✅ Patent 9,412,440 granted on 2016-08-09Systems and methods of pipelined output latching involving synchronous memory arrays
#99 | 2016-08-09 ✅ Patent 9,413,295 granted on 2016-08-09Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features
#100 | 2016-07-07 ✅ Patent 9,613,670 granted on 2017-04-04Memory systems and methods involving high speed local address circuitry
Also check out GSI Technology, Inc.'s (Sunnyvale, United States) applicant profile with 131 patent applications submitted.
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