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Inventor profile of:

LeeLean Shu

City:

Los Altos, California

Country:

United States

Published Applications:

7

Last publication date:

2020-05-14

Top Assignees for applications by LeeLean Shu

The entities that hold a legal rights for patent applications filed by inventor Shu LeeLean:

  • GSI Technology Inc. 7 Sunnyvale, CA United States

Recent patent applications by Shu LeeLean

LeeLean Shu from Los Altos, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-05-14
US20200151236A1
Physics

In-memory full adder

#2 | 2018-06-07
US20180157621A1
Physics

Four steps associative full adder

#3 | 2016-11-01
US14881098
Physics

Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features

#4 | 2016-08-30
US14105133
Physics

Systems and methods of memory and memory operation involving input latching, self-timing and/or other features

#5 | 2015-10-13
US14105124
Physics

Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features

#6 | 2013-06-13
US20130148415A1
Physics

Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other features

#7 | 2013-06-13
US20130148414A1
Physics

Systems and methods of sectioned bit line memory arrays

InventorID:

284068 ⎘

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