171833 ⎘
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere; Testing of electronic circuits, e.g. by signal tracer; Testing of digital circuits; Analysis of signal quality Evaluation methods, e.g. shmoo plots
EYE-DIAGRAM INDEX ANALYTIC METHOD, COMPUTER READABLE RECORDING MEDIUM, AND ELECTRONIC APPARATUS
#2CIRCUIT, CHIP AND SEMICONDUCTOR DEVICE
#3METHOD AND APPARATUS OF ANALYZING DATA, AND STORAGE MEDIUM
#4Circuit, chip and semiconductor device
#5Identifying data valid windows
#6Margin Test Methods and Circuits
#7Margin test methods and circuits
#8Circuit, chip and semiconductor device
#9MEASUREMENT SYSTEM AND METHOD FOR AUTOMATED MEASUREMENT OF SEVERAL CONTRIBUTIONS TO SIGNAL DEGRADATION
#10Margin test methods and circuits
#11Waveform observation system and method for waveform observation
#12Margin test methods and circuits
#13Systems and methods for testing an embedded controller
#14Semiconductor wafer evaluation standard setting method, semiconductor wafer evaluation method, semiconductor wafer manufacturing process evaluation method, and semiconductor wafer manufacturing method
#15Margin test methods and circuits
#16DFE margin test methods and circuits that decouple sample feedback timing
#17On-chip eye diagram capture
#18Margin test methods and circuits
#19Noise figure measurement using narrowband compensation
#20Margin test methods and circuits
#21On-chip eye diagram capture
#22Receiver circuit architectures
#23Test apparatus and test method
#24Flexible timebase for eye diagram
#25METHOD OF DETERMINING CHARACTERISTICS OF DEVICE UNDER TEST, PROGRAM, AND STORAGE MEDIUM STORING PROGRAM
#26Method and device for clock data recovery
#27Increased reliability in the processing of digital signals
#28Method and device for clock-data recovery
#29EYE MAPPING BUILT-IN SELF TEST (BIST) METHOD AND APPARATUS
#30Apparatus and method for eye margin calculating, and computer-readable recording medium recording program therefof
#31Margin test methods and circuits
#32DFE Margin Test Methods and Circuits that Decouple Sample and Feedback Timing
#33Apparatus and method for analyzing a signal under test
#34SYSTEM AND METHOD FOR DETERMINING CIRCUIT FUNCTIONALITY UNDER VARYING EXTERNAL OPERATING CONDITIONS
#35Noise separating apparatus, noise separating method, probability density function separating apparatus, probability density function separating method, testing apparatus, electronic device, program, and recording medium
#36System and Method for Physical-Layer Testing of High-Speed Serial Links in their Mission Environments
#37METHOD OF GENERATING AN EYE DIAGRAM OF INTEGRATED CIRCUIT TRANSMITTED SIGNALS
#38NOISE SEPARATING APPARATUS, NOISE SEPARATING METHOD, PROBABILITY DENSITY FUNCTION SEPARATING APPARATUS, PROBABILITY DENSITY FUNCTION SEPARATING METHOD, TESTING APPARATUS, ELECTRONIC DEVICE, PROGRAM, AND RECORDING MEDIUM
#39Generating an eye diagram of integrated circuit transmitted signals
#40Optical debug mechanism
#41Measuring device and method for measuring relative phase shifts of digital signals
#42Methodology for estimating statistical distribution characteristics of physical parameters of semiconductor device
#43Estimating boundaries of Schmoo plots
#44Flexible timebase for EYE diagram
#45Obtaining test data for a device
#46Pattern identification and bit level measurements on repetitive patterns
#47DFE margin test methods and circuits that decouple sample and feedback timing
#48Signal measurement systems and methods
#49Method and system for timing measurement of embedded macro module
#50Apparatus and method for performing eye scan
#51Waveform analyzer
#52Method and apparatus for creating performance limits from parametric measurements
#53Testing and repair methodology for memories having redundancy
#54Input stage threshold adjustment for high speed data communications