Dynamic hardware resource shadowing and memory error protection

Memory card slot interface adapter

Accelerator controller hub

System and method for providing heterogeneous personality bitstreams on field-programmable gate arrays from a baseboard management controller

Multiple mode arithmetic circuit

Method and system creating and using data confidence fabric processing paths

Messages based on input/output device signals to virtual computers

Interleaving in multi-level data cache on memory bus

Inter-processor communication

System and method to secure embedded controller flashing process

Intelligent controller and sensor network bus, system and method including a message retransmission mechanism

Virtual network pre-arbitration for deadlock avoidance and enhanced performance

VIRTUAL COM PORT BRIDGE SUPPORTING HOST-TO-HOST USB TRANSMISSION

Vector send operation for message-based communication

Task activating for accelerated deep learning

Modular Polyhedral Computer Architectures and Network Optimization Algorithms

Switching device, peripheral component interconnect express system, and method for initializing peripheral component interconnect express system

Message passing framework for audio/video streaming in a topology of devices

Apparatuses, systems, and methods for dynamically switching graphics modes for providing a display signal

Computer system and a computer device

Integrated communication unit

Extending multichip package link off package

Method, apparatus, electronic device and computer readable storage medium for supporting communication among chips

Android IMEI Finder/Recorder/Tracker International Mobile Equipment Identity Number

Universal host and non-volatile memory express storage domain discovery for non-volatile memory express over fabrics

Management of zoned storage drives

Parallel operations in aggregated and virtualized solid state drives

Access optimization in aggregated and virtualized solid state drives

Aggregated and virtualized solid state drives with multiple host interfaces

Technologies for facilitating remote memory requests in accelerator devices

GPU chiplets using high bandwidth crosslinks

ASYNCHRONOUS CACHE FLUSH ENGINE TO MANAGE PLATFORM COHERENT AND MEMORY SIDE CACHES

Method for locating and repairing intermittent faults in communication structures of an aircraft

Apparatus and method for fault handling of an offload transaction

APPARATUS AND METHOD FOR OPERATING SYSTEM NOTIFICATION OF INTER-CORE WORK OFFLOAD

Apparatus and method for modifying addresses, data, or program code associated with offloaded instructions

Systems and methods for multi PF emulation using VFs in SSD controller

Prefetching in a lower level exclusive cache hierarchy

Topological quantum error correction using a data bus

Automatic system provisioning for NVME-over-fabric storage

INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING SYSTEM

Fabric vectors for deep learning acceleration

Reconfigurable channel interfaces for memory devices

Host multipath layer notification and path switchover following node failure

Method for implementing processing elements in a chip card

Data rewriting method and data rewriting system

UNIVERSAL BRIDGE CONTROLLER FOR MACHINE LANGUAGE INTERPRETIVE COLLABORATIVE ROBOT AND MACHINE INTERFACE

Hub device, display device and operation method thereof

Data encoding using spare channels in a memory system

Storage level load balancing

Storage level load balancing

Asynchronous channel based bus architecture enabling decoupled services

Device, apparatus and system to reduce current leakage during differential communications

Systems and methods for PCI load balancing

Host device with multi-path layer configured for detection and resolution of initiator-related conditions

Cluster of processing elements having split mode and lock mode

Memory-fabric-based data-mover-enabled memory tiering system

System and method for providing in-storage acceleration (ISA) in data storage devices

INFORMATION PROCESSING SYSTEM

Processor interconnect link training system

Multiprocessor system with improved secondary interconnection network

VRAN with PCIe fronthaul

Hybrid bus apparatus

DEVICE COMMUNICATION CONTROL MODULE AND DEVICE COMMUNICATION CONTROL METHOD

Peripheral I/O device with assignable I/O and coherent domains

Flexible on-die fabric interface

SECONDARY BUS COMMUNICATION BETWEEN DEVICES IN AN AUTOMATED TRANSACTION MACHINE

Multi-device storage system with hosted services on peer storage devices

Quasi-volatile memory device with a back-channel usage

Intelligent path selection and load balancing

Methods and systems for communicating with an M2M device

Integrated circuit, semiconductor device and control method for semiconductor device

Networked computer with multiple embedded rings

Networked computer with multiple embedded rings

Configuring programmatic interfaces of bus bridges in computer systems

Secure storage using a removable bridge

Power and data hub, communication system, and related method

Multi-port storage device multi-socket memory access system

Link affinitization to reduce transfer latency

Technologies for performant column read operations on clustered data in a dimm architecture

Computer activation method

Remote terminal apparatus enabled to reset a plug-and-play compatible device even fixedly connected without removing the device from the apparatus, control method thereof, computer system, and non-transitory recording medium

Disaggregation of SOC architecture

Enabling product SKUs based on chiplet configurations

Configuring data pipelines with image understanding

Embedding rings on a toroid computer network

Memory controller

Video redirection across multiple information handling systems (IHSs) using a graphics core and a bus bridge integrated into an enclosure controller (EC)

Width and frequency conversion with PHY layer devices in PCI-express

Interface for bridging out-of-band information from a downstream communication link to an upstream communication link

Hardware for supporting OS driven observation and anticipation based on more granular, variable sized observation units

Serial connection between management controller and microcontroller

Value document handling apparatus having a data communication system and method for distributing sensor data in a value document handling apparatus

System monitor

Configuring programmable logic region via programmable network

Virtualization of a reconfigurable data processor

SEAMLESS I/O IN FIBRE CHANNEL POINT TO POINT TOPOLOGY WHILE A STORAGE PORT IS CHANGED

Memory system

Storage device performing peer-to-peer communication with external device without intervention of host

Target port set selection for a connection path based on comparison of respective loads

Specialized device instantiation onto PCIe fabrics

Memory system topologies including a memory die stack

Method for maintaining memory sharing in a computer cluster

Video load balancing and error detection based on measured channel bandwidth

Method, system and program product for mask-based compression of a sparse matrix

Graphics processing integrated circuit package

Channel allocation among low voltage drive circuits

NETWORK INTERFACE DEVICE WITH NON-VOLATILE MEMOERY EXPREESS OVER FABRICS (NVME-OF) SUPPORT OVER WIDE-AREA NETWORKS

Multi-protocol support on common physical layer

Modular controllers

Technologies for accelerator fabric protocol multipathing

Virtualization of a reconfigurable data processor

Electronic control unit and method for verifying control program

Scalable input/output system and techniques to transmit data between domains without a central processor

Signal transmission method and a circuit structure for heterogeneous platforms

Parallel control method and system for intelligent workshop

Flex bus protocol negotiation and enabling sequence

Exchange of data between processor modules

Exchange of data between processor modules

Memory management system and method thereof

INFORMATION RECORDING DEVICE, ACCESS DEVICE, AND ACCESS METHOD

Processor repair

Handling exceptions in a multi-tile processing arrangement

Memory system topologies including a buffer device and an integrated circuit memory device

Method remote control

Memory sub-system with multiple ports having single root virtualization

Methods and systems for devices with self-selecting bus decoder

MULTIPLE-PATH THUNDERBOLT STORAGE APPARATUS AND SYSTEM

Apparatus and method for a high throughput parallel co-processor and interconnect with low offload latency

Large packet daisy chain serial bus

Process control system

Bus protocol for multiple chipsets

Method and system for in-line ECC protection

Remote service discovery and inter-process communication

Method and apparatus to prevent a node device from transmitting an unallowable message onto a CAN bus

Methods and apparatus for synchronizing uplink and downlink transactions on an inter-device communication link

HMC control device and method of CPU side and HMC side for low power mode, and power management method of HMC control device

Identifier (ID) based communication system

Farming data collection and exchange system

IN-VEHICLE RELAY DEVICE, CONTROL PROGRAM, AND MEMORY SHARING METHOD

Managing related devices for virtual machines using robust passthrough device enumeration

Managing related devices for virtual machines utilizing shared device data

Reconfigurble CPU/GPU interconnect to mitigate power/thermal throttling

Neural network circuitry having approximate multiplier units

SSD architecture for FPGA based acceleration

Multi host controller and semiconductor device including the same

Bridged micro louvers for active privacy screen

Network system

Hybrid bus hub circuit and related apparatus

Heterogeneous bus bridge circuit and related apparatus

Streaming platform architecture for inter-kernel circuit communication for an integrated circuit

PCIE lane aggregation over a high speed link

Interposer systems for information handling systems

Translation circuitry for an interconnection in an active interposer of a semiconductor package

Buffer credit management in a data storage system

System and method for recovery of sideband interfaces for controllers

Microthreading for accelerated deep learning

Redundancy in a PCI express system

Methods and Systems for Assigning Addresses to Devices That Use Master / Slave Communication Protocols

Distributed error detection and correction with hamming code handoff

Method and system for executing queries on indexed views

Managed query execution platform, and methods thereof

Split direct memory access (DMA)

Multi-processor, multi-domain, multi-protocol, cache coherent, speculation aware shared memory and interconnect

Adaptive credit-based replenishment threshold used for transaction arbitration in a system that supports multiple levels of credit expenditure

Credit aware central arbitration for multi-endpoint, multi-core system

Virtual network pre-arbitration for deadlock avoidance and enhanced performance

Multi-power-domain bridge with prefetch and write merging

Multicore, multibank, fully concurrent coherence controller

Delayed snoop for improved multi-process false sharing parallel thread performance

Multicore shared cache operation engine

Processing system with interspersed processors with multi-layer interconnect

Configurable cache for multi-endpoint heterogeneous coherent system

Multi-processor bridge with cache allocate awareness

Multicore shared cache operation engine

System and method for extended peripheral component interconnect express fabrics

Network interface device and host processing device

System and method for accessing a shared resource

Maximizing resource utilization through efficient component communication in disaggregated datacenters

Rack controller with native support for intelligent patching equipment installed in multiple racks

Producer/consumer paced data transfer within a data processing system having a cache which implements different cache coherency protocols

Vehicle controller

Coherent caching of data for high bandwidth scaling

Error detection within an integrated circuit chip

Instructions for performing multi-line memory accesses

Reducing memory cache control command hops on a fabric

Minimum-size belief propagation network for FEC iterative encoders and decoders and related routing method

Target optimized auto provisioning of storage in a discoverable storage network

BRIDGE DEVICE, METHOD FOR CONTROLLING BRIDGE DEVICE, AND INFORMATION PROCESSING APPARATUS INCLUDING BRIDGE DEVICE

System and method for identifying operational disruptions in mobile computing devices via a monitoring application that repetitively records multiple separate consecutive files listing launched or installed applications

STORAGE CONTROL SYSTEM AND STORAGE CONTROL METHOD

Learning-based high-performance, energy-efficient, fault-tolerant on-chip communication design framework

Reconfigurable server and server rack with same

Selectable system controller for multi-processor computing systems

Reconfigurable network infrastructure

Server system and method for managing two baseboard management controllers

System, apparatus and method for peer-to-peer communication on a multi-drop interconnect

Interface for memory readout from a memory component in the event of fault

INTEGRATED CIRCUIT WITH HOT PLUG CONTROL

Systems and methods to reprogram mobile devices

Memory allocation method and server

Memory module and data processing system for reducing heat generation

Bus-invert coding with restricted hamming distance for multi-byte interfaces

Reverse charging device, and method and device for regulating reverse charging current

Transaction routing for system on chip

Apparatus and method to provide a multi-segment I2C bus exerciser/analyzer/fault injector and debug port system

DATA PROCESSING

Core-to-core communication

Dynamic configuration of input/output controller access lanes

Technologies for establishing communication channel between accelerator device kernels

Multi-device storage system with hosted services on peer storage devices

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND COMPUTER READABLE MEDIUM

Integrated circuit applications using partial reconfiguration

Speed converter for FPGA-based UFS prototypes

Personalized services based on confirmed proximity of user

Hard IP blocks with physically bidirectional passageways

Searchable Storage

Data routing by a driver installed from a computing device

Interconnection network for integrated circuit

Electronic apparatus device and control method including a host communicating with a plurality of connectors in a lump through a bus line

Interconnection network for integrated circuit

LIGHTWEIGHT UNIVERSAL SERIAL BUS (USB) COMPOUND DEVICE IMPLEMENTATION

Storage system and control method thereof

One-way data transfer device with onboard system detection

Methods and apparatuses for providing data received by a state machine engine

Method and system for configuring filter objects for a controller area network controller

Memory module with timing-controlled data buffering

Multiple reset modes for a PCI host bridge

Bus translator

Event messaging in a system having a self-scheduling processor and a hybrid threading fabric

Multi-threaded, self-scheduling processor

Thread commencement using a work descriptor packet in a self-scheduling processor

Processor and information processing apparatus

SPECULATIVE READ MECHANISM FOR DISTRIBUTED STORAGE SYSTEM

Device for use in a configurable network

Technolgies for millimeter wave rack interconnects

Communicating with a device

System, apparatus and method for multi-die distributed memory mapped input/output support

SYSTEM WITH AN INTERPOSER FOR HIGH-SPEED MEMORY MODULES

TECHNOLOGIES FOR ADDING COMPUTATIONAL ABILITY TO MEMORY DEVICES WITHOUT CHANGING MEDIA LAYERS

Combining switch slot resources

Remote service discovery and inter-process communication

STORAGE SYSTEM AND CONTROL METHOD THEREFOR

Technologies for fast recovery of distributed storage systems on disaggregated storage

SSD architecture for FPGA based acceleration

SSD architecture for FPGA based acceleration

SSD architecture for FPGA based acceleration

SSD architecture for FPGA based acceleration

Method, device, and system for controlling data read/write command in NVMe over fabric architecture

Interface for bridging out-of-band information from a downstream communication link to an upstream communication link

Work device and time-measuring method of work device

Memory system topologies including a buffer device and an integrated circuit memory device

Storage system including a plurality of storage devices arranged in a holder

Flexible expandable automation device with hot-swappable I/O-units

VIRTUAL COMPORT BRIDGE SUPPORTING HOST-TO-HOST USB TRANSMISSION

BUFFERED INTERCONNECT FOR HIGHLY SCALABLE ON-DIE FABRIC

Method for dynamically provisioning virtualized functions in a USB device by means of a virtual USB hub

System, apparatus and method for increasing bandwidth of edge-located agents of an integrated circuit

ARCHITECTURE FOR CONSOLIDATING MULTIPLE SOURCES OF LOW-BANDWIDTH DATA OVER A SERIAL BUS

Configurable bus

Host bus adaptor with configurable interface

Method for reordering out of order responses from decomposed requests in bridge IP

Bridged micro louvers for active privacy screen

Multiplexed memory in a communication processing system

Information processing system, relay device, auxiliary relay device, management device, method, and storage medium

Measuring per-node bandwidth within non-uniform memory access (NUMA) systems

One-way data transfer device with onboard system detection

Centralized-distributed mixed organization of shared memory for neural network processing

METHODS AND APPARATUS TO IMPROVE PERFORMANCE DATA COLLECTION OF A HIGH PERFORMANCE COMPUTING APPLICATION

Power control of inter-domain transaction bridge

Regulation for atomic data access requests

PCIe lane aggregation over a high speed link

System having a hybrid threading processor, a hybrid threading fabric having configurable computing elements, and a hybrid interconnection network

SOLID STATE DRIVE WITH REDUCED HOST OVERSIGHT OF HIGH PRIORITY READ COMMAND

Upgradable vehicular computing methods and apparatuses

Dual port storage device performing peer-to-peer communication with external device without intervention of host

Multiprocessor system with improved secondary interconnection network

Processing system with interspersed processors with multi-layer interconnection

Methods and systems for devices with self-selecting bus decoder

Device programming system with protocol emulation

Flash registry with on-disk hashing

Vehicle system including remote start data bus command sending based upon a short-range link and related methods

Method, apparatus, and system for manageability and secure routing and endpoint access

Technologies for providing dynamic communication path modification for accelerator device kernels

Storage system having multiple bridges corresponding to multiple operation modes and control method therefor

Semiconductor device and semiconductor system including the same

Width and frequency conversion with PHY layer devices in PCI-express

Addressable distributed memory in a programmable logic device

Controller system

USB bridge circuitry and of RID A, RID GND inputs, IDGND output

High bandwidth universal serial bus (USB) camera

Game controller with structural bridge

CONVEYING EARLY HINT INFORMATION FOR PHYSICAL LINK STATE CHANGES

Uniform performance monitor for a data storage device and method of operation

Interface circuit and packet transmission method thereof

Bridge connecting apparatus, communication control system, method and program

Bridge device with DMA data transferring to upstream device with reset and clear feature command

System and method for providing in-storage acceleration (ISA) in data storage devices

Method, apparatus, system for thunderbolt-based display topology for dual graphics systems

Serial connection between management controller and microcontroller