190375 ⎘
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units; Information transfer, e.g. on bus; Bus structure; Coupling between buses using bus bridges with arbitration and deadlock prevention
NoC routing in a multi-chip device
#2Deadlock condition avoidance in a data processing system with a shared slave
#3Producing deadlock-free routes in lossless cartesian topologies with minimal number of virtual lanes
#4System-on-chips and methods of controlling reset of system-on-chips
#5System-on-chips and methods of controlling reset of system-on-chips
#6Watchdog for addressing deadlocked states
#7Producing deadlock-free routes in lossless cartesian topologies with minimal number of virtual lanes
#8DRP determining system and DRP determining method using the same
#9PROTOCOL-FRAMED CLOCK LINE DRIVING FOR DEVICE COMMUNICATION OVER MASTER-ORIGINATED CLOCK LINE
#10Detecting deadlock in a cluster environment using big data analytics
#11System-on-chip, mobile terminal, and method for operating the system-on-chip
#12Deadlock avoidance in a multi-processor computer system with extended cache line locking
#13Method and apparatus for handling outstanding interconnect transactions
#14Asynchronous interface
#15System-on-chip, mobile terminal, and method for operating the system-on-chip
#16Methods and circuits for deadlock avoidance
#17Opening a data set
#18Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface
#19Method, apparatus and system for modular on-die coherent interconnect for packetized communication
#20Interconnection network topology for large scale high performance computing (HPC) systems
#21Interconnection network topology for large scale high performance computing (HPC) systems
#22Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface
#23Resource management for peripheral component interconnect-express domains
#24Providing a sideband message interface for system on a chip (SoC)
#25Direct routing between address spaces through a nontransparent peripheral component interconnect express bridge
#26Interface device and method for consistently exchanging data
#27TRANSACTION ORDERING TO AVOID BUS DEADLOCKS
#28Providing a sideband message interface for system on a chip (SoC)
#29Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface
#30Bus system and deadlock avoidance circuit thereof
#31USB To I2C And SPI Bridge
#32Bus system and bridge circuit connecting bus system and connection apparatus
#33Deadlock avoidance in a bus fabric
#34Handling data processing requests
#35Deadlock avoidance in a bus fabric
#36Deadlock avoidance in a bus fabric
#37Data processor
#38Data transfer device, data transfer method, and information processing apparatus
#39Data processor
#40Deadlock avoidance in a bus fabric
#41Methods and systems for arbitration of parallel multi-event processing
#42Transactional watch mechanism