PCIe-based data transmission method, apparatus, and system

Multi-chip interconnection system based on PCIE buses

Disaggregated memory server having chassis with a plurality of receptacles accessible configured to convey data with PCIE bus and plurality of memory banks

Memory system

PCIE-based data transmission method and apparatus

PCIe-based data transmission method, apparatus, and system

Peripheral component interconnect (PCI) hosting device

Memory access handling for peripheral component interconnect devices

SYSTEM AND METHOD FOR FACILITATING DATA-DRIVEN INTELLIGENT NETWORK WITH INGRESS PORT INJECTION LIMITS

Control system, switch, and method for controlling execution device

CCIX port management for PCI express traffic

Isolated universal serial bus repeater with high speed capability

Peripheral component interconnect attributes shared using address bits

Bandwidth allocation for storage system commands in peer-to-peer environment

Non-volatile memory with optimized read

SYSTEM AND METHOD FOR BOOTING SERVERS IN A DISTRIBUTED STORAGE TO IMPROVE FAULT TOLERANCE

Virtual device composition in a scalable input/output (I/O) virtualization (S-IOV) architecture

Methods implementing doorbell register/file identification table with high-speed data communication fabric for cloud gaming data storage and retrieval

DIE-TO-DIE ADAPTER

DIE-TO-DIE INTERCONNECT

System including PIPE5 to PIPE4 converter and method thereof

PARAMETER EXCHANGE FOR A DIE-TO-DIE INTERCONNECT

Flattening portal bridge

Hot-plugging control method, device and retimer

Apparatus, method and computer program product for efficient software-defined network accelerated processing using storage devices which are local relative to a host

RETIMERS TO EXTEND A DIE-TO-DIE INTERCONNECT

Memory system and data processing system

Enabling virtual functions on storage media

METHODS FOR DISTRIBUTING SOFTWARE-DETERMINED GLOBAL LOAD INFORMATION

Out-of-band management of FPGA bitstreams

DEVICE WAKE-UP TECHNOLOGIES

DIE-TO-DIE INTERCONNECT PROTOCOL LAYER

STANDARD INTERFACES FOR DIE TO DIE (D2D) INTERCONNECT STACKS

PCIe device

PCIe device and operating method thereof

PCIe device with changeable function types and operating method thereof

PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIe) SYSTEM AND METHOD OF OPERATING THE SAME

Peripheral component interconnect express (PCIe) interface device and method of operating the same

Peripheral component interconnect express interface device and operating method thereof

COMPLIANCE AND DEBUG TESTING OF A DIE-TO-DIE INTERCONNECT

Array-based copy mechanism utilizing logical addresses pointing to same data block

Initialization methods and associated controller, memory device and host

System and method for facilitating efficient packet forwarding in a network interface controller (NIC)

Data transmission circuit and method, and storage device

Storage protocol emulation in a peripheral device

Multi-format graphics processing unit docking board

Peripheral component interconnect express interface device and method of operating the same

Enhanced low-priority arbitration

Exposing untrusted devices to virtual machines

Peripheral component interconnect express device and method of operating the same

Peripheral component interconnect express (PCIe) device method for delaying command operations based on generated throughput analysis information

System and method of enhancing performances of information handling systems by utilizing graphics processing units

Connection of input and / or output modules to a fieldbus with a higher-level controller

Circuit structure with automatic PCIe link configuration adjustment and method thereof

Equalization time configuration method, chip, and communications system

BUS SYSTEM WITH ADDRESSABLE UNITS AND METHOD FOR ADDRESSING SAID UNITS

Apparatuses, systems, and methods for providing communication between memory cards and host devices

Cross address-space bridging

Computing system for reducing latency between serially connected electronic devices

High density peripheral card chassis

Method for information configuration in power mode change for an interconnection protocol, controller and storage device

Communication apparatus and control method thereof

SYSTEMS AND METHODS INCLUDING A MACHINE-LEARNT MODEL FOR RETRIEVAL

System and method for extended peripheral component interconnect express fabrics

DATA TRANSMISSION EVENT USED FOR INTERCONNECTED DIES

Multi-host networking systems and methods

Circuit device and electronic apparatus

Signal transmitting circuit, and semiconductor apparatus and semiconductor system using the same

Peripheral component interconnect express interface device and system including the same

Methods and systems for using a peripheral device to assist virtual machine IO memory access tracking

Boosted boot procedure by background re-arrangement of read patterns

Transmission control method and transmission control system

System and method for facilitating efficient utilization of an output buffer in a network interface controller (NIC)

Rack assembly providing high speed storage access for compute nodes to a storage server through a PCI express fabric

Non-interrupting portable page request interface

Embedded computation instruction performance profiling

Algorithms for use of load information from neighboring nodes in adaptive routing

FPGA implementation of low latency architecture of XGBoost for inference and method therefor

Ball grid array storage for a memory sub-system

Systems and methods for per traffic class routing

System and method for facilitating efficient packet forwarding using a message state table in a network interface controller (NIC)

SYSTEM AND METHOD FOR FACILITATING DATA REQUEST MANAGEMENT IN A NETWORK INTERFACE CONTROLLER (NIC)

System and method for facilitating efficient message matching in a network interface controller (NIC)

Deadlock-free multicast routing on a dragonfly network

System and method for facilitating self-managing reduction engines

ENCRYPTED KEY MANAGEMENT

System and method for authorization scope extension for security protocol and data model capable devices

PCI EXPRESS CHAIN DESCRIPTORS

ADAPTIVE COLLABORATIVE MEMORY WITH THE ASSISTANCE OF PROGRAMMABLE NETWORKING DEVICES

Method and system for providing network egress fairness between applications

System and method for facilitating fine-grain flow control in a network interface controller (NIC)

System and method for facilitating data-driven intelligent network with endpoint congestion detection and control

System and method for facilitating data-driven intelligent network with per-flow credit-based flow control

System and method for facilitating tracer packets in a data-driven intelligent network

METHOD AND SYSTEM FOR FACILITATING WIDE LAG AND ECMP CONTROL

Weighting routing

System communication technique over PCIe® (peripheral component interconnect express) link

System and method for facilitating efficient address translation in a network interface controller (NIC)

System and method for facilitating hybrid message matching in a network interface controller (NIC)

System and method for facilitating efficient load balancing in a network interface controller (NIC)

Switch device for facilitating switching in data-driven intelligent network

System and method for facilitating global fairness in a network

System and method for facilitating data-driven intelligent network with flow control of individual applications and traffic flows

Fat tree adaptive routing

SYSTEM AND METHOD FOR DYNAMIC ALLOCATION OF REDUCTION ENGINES

Systems and methods for on the fly routing in the presence of errors

Latency and jitter for traffic over PCIe

Configurable multi-function PCIe endpoint controller in an SoC

System and method for facilitating on-demand paging in a network interface controller (NIC)

PROTECTION AGAINST TRANSLATION LOOKUP REQUEST FLOODING

Method, system, and apparatus for supporting multiple address spaces to facilitate data movement

PCIe Race Condition secure by Trait Claims and Address Space by using Portable Stimulus

Determination of power-off duration of NVMe SSD

DYNAMIC BUFFER MANAGEMENT IN DATA-DRIVEN INTELLIGENT NETWORK

System and method for facilitating data-driven intelligent network

System and method for facilitating efficient packet injection into an output buffer in a network interface controller (NIC)

Systems and methods for adaptive routing in the presence of persistent flows

System and method for facilitating efficient management of non-idempotent operations in a network interface controller (NIC)

Systems and methods for expanding memory access

System and method for facilitating operation management in a network interface controller (NIC) for accelerators

System and method for facilitating efficient event notification management for a network interface controller (NIC)

System and method for facilitating efficient host memory access from a network interface controller (NIC)

METHOD AND APPARATUS FOR REPLACING DATA FROM NEAR TO FAR MEMORY OVER A SLOW INTERCONNECT FOR OVERSUBSCRIBED IRREGULAR APPLICATIONS

Method and apparatus for distributed direct memory access for system on chip performing read or write operations

System and method for performing on-the-fly reduction in a network

Method and system for providing network ingress fairness between applications

Message passing framework for audio/video streaming in a topology of devices

Optimized adaptive routing to reduce number of hops

Support of PCIe device with multiple security policies

Mechanism for device interoperability of switches in computer buses

Transfer device, information processing device, and data transfer method

Performance-driven access protocol switching for a logical storage device

Performance-driven movement of applications between containers utilizing multiple data transmission paths with associated different access protocols

Automated seamless migration across access protocols for a logical storage device

Dragonfly routing with incomplete group connectivity

Distributed midplane for computer system

Scalable communication switch system

Sideband signaling in a peripheral component interconnect (PCI) express (PCIE) link

DYNAMIC PROVISIONING OF PCIE DEVICES AT RUN TIME FOR BARE METAL SERVERS

Method for power brake staggering and in-rush smoothing for multiple endpoints

Method to perform hash table lookup for keys wider than data path size

Machine templates for compute units

Flit-based parallel-forward error correction and parity

Method for implementing storage service continuity in storage system, front-end interface card, and storage system

Host and its memory module and memory controller

High throughput circuit architecture for hardware acceleration

USB device, USB cable and USB repeater thereof

Anomaly aware log retrieval from disk array enclosures (DAEs)

Managed NAND flash memory region control against endurance hacking

Pushing a firmware update patch to a computing device via an out-of-band path

IO processing method and apparatus

Optical output device, bus unit, bus control unit and methods

Techniques for isolating interfaces while testing semiconductor devices

Channel structure for signal transmission

SYSTEM, METHOD, APPARATUS AND ARCHITECTURE FOR DYNAMICALLY CONFIGURING DEVICE FABRICS

Modularized riser system

High performance interconnect

Method and apparatus for detecting ATS-based DMA attack

SYSTEM, APPARATUS AND METHODS FOR DIRECT DATA READS FROM MEMORY

ADD-IN CARD WITH LOW PROFILE POWER CONNECTOR

ADD-IN CARD HAVING HIGH PERFORMANCE SEMICONDUCTOR CHIP PACKAGES WITH DEDICATED HEAT

Accessing an external storage through a NIC

PCI express to PCI express based low latency interconnect scheme for clustering systems

Transferring data between solid state drives (SSDs) via a connection between the SSDs

Electrical and optical interfaces at different heights along an edge of a package to increase bandwidth along the edge

Using a NIC as a network accelerator to allow VM access to an external storage via a PF module, bus, and VF module

Using physical and virtual functions associated with a NIC to access an external storage through network fabric driver

Unified management of virtual machines and bare metal computers

Bare metal computer for booting copies of VM images on multiple computing devices using a smart NIC

Transaction analyzer for peripheral bus traffic

Memory system

PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) DEVICE ADD-ON CARD DETECTION

Methods and systems for migrating virtual functions in association with virtual machines

Multiple field programmable gate array (FPGA) based multi-legged order transaction processing system and method thereof

High bandwidth controller memory buffer (CMB) for peer to peer data transfer

SUPPORT FOR MULTIPLE HOT PLUGGABLE DEVICES VIA EMULATED SWITCH

Electronic device and magnetic disk device

Anomaly detection and remediation utilizing analysis of storage area network access patterns

Chip and associated chip system

Method and system for implementing security operations in an input/output device

PCI Express to PCI Express based low latency interconnect scheme for clustering systems

Innovative interconnect design for package architecture to improve latency

Command memory buffer systems and methods

Computational storage systems and methods

Inter-device processing system with cache coherency

Method and system for performing read/write operation within a computing system hosting non-volatile memory

Method, apparatus, device and system for capturing trace of NVME hard disc

Authentication and information system for reusable surgical instruments

Non-volatile memory express (NVMe) data processing method and system

System and method of determining available bandwidth in disaggregated tiered cache for cloud content storage

Systems and methods involving hybrid quantum machines, aspects of quantum information technology and/or other features

LOAD BALANCING FOR IP FAILOVER

PCIe device peer-to-peer communications

Cluster identifier remapping for asymmetric topologies

Shared memory workloads using existing network fabrics

Extended memory architecture

Methods and apparatus for boot time reduction in a processor and programmable logic device environment

Method for allocating address space used by MMIO and computer system utilizing the same

Electronic device, determine a setting of a host device for communication in a subsequent phase

Disaggregated switch control path with direct-attached dispatch

Bi-directional interpositioning of virtual hardware

TECHNOLOGIES FOR INCREASING LINK EFFICIENCY

System and method for scheduling sharable PCIe endpoint devices

Data link changes based on requests

Memory sub-system including an in package sequencer separate from a controller

Dynamic presentation of interconnect protocol capability structures

Electronic apparatus and hot-swappable storage device thereof

Efficient management of bus bandwidth for multiple drivers

Debugging a memory sub-system with data transfer over a system management bus

Method, device and medium for allocating resource based on type of PCI device

System, apparatus and methods for handling consistent memory transactions according to a CXL protocol

Memory allocation for distributed processing devices

Acceleration circuitry for posit operations

Partition utilization awareness of logical units on storage arrays used for booting

Non-interrupting portable page request interface

SYSTEM, METHOD, AND PROGRAM FOR INCREASING EFFICIENCY OF DATABASE QUERIES

Bus transceiver

Acceleration circuitry for posit operations

STORING TRANSLATION LAYER METADATA IN HOST MEMORY BUFFER

PRIVATE SNAPSHOTS BASED ON SPARSE FILES AND DATA REPLICATION

Peer-to-peer link sharing for upstream communications from XPUS to a host processor

Heterogeneous computing system and heterogeneous computing method using the system

Host device with automated connectivity provisioning

System and method of interfacing co-processors and input/output devices via a main memory system

Complete autozoning in fibre channel SANs

System with cache-coherent memory and server-linking switch

MEMORY WITH CACHE-COHERENT INTERCONNECT

Disaggregation of computing devices using enhanced retimers with circuit switching

MEMORY DEVICE AND ASSOCIATED FLASH MEMORY CONTROLLER

In-memory computing with cache coherent protocol

Disaggregated memory server

Module mounted in server to share block-level storage and resource

Memory controller and method for monitoring accesses to a memory module

Storage device processing stream data, system including the same, and operation method

Semiconductor integrated circuit, receiving apparatus, and memory device

Systems and methods involving features of hardware virtualization such as separation kernel hypervisors, hypervisors, hypervisor guest context, hypervisor context, rootkit detection/prevention, and/or other features

Systems, apparatus and methods for rapid peripheral component interconnect express (PCIE) system boot

Interface Bus for Inter-Die Communication in a Multi-Chip Package Over High Density Interconnects

Information processing apparatus having an integrated circuit chip with first and second communication units having address translation function

Migation of data portions between different sized slices in the same of different performance tier

System and method for supporting multi-mode and/or multi-speed non-volatile memory (NVM) express (NVMe) over fabrics (NVMe-oF) devices

Generation of a volume-level of an IO request

Electronic device and associated control method for reducing power consumption

Disjoint array computer

Apparatuses and methods for selective communication through a memory connector

Process address space identifier virtualization using hardware paging hint

Protecting device detachment with bus encryption

DISAGGREGATED DIE WITH INPUT/OUTPUT (I/O) TILES

Method and system for automatic bifurcation of PCIe in BIOS

Memory storage device and management method thereof

Host device with efficient automated seamless migration of logical storage devices across multiple access protocols

System and method for UEFI advanced graphics utilizing a graphics processing unit

Network architecture providing high speed storage access through a PCI express fabric between a compute node and a storage server within an array of compute nodes

Network architecture providing high speed storage access through a PCI express fabric between a compute node and a storage server

Circuits for data encryption and decryption, and methods thereof

Generic packet header insertion and removal

Billboard for context information sharing

Source ordering in device interconnects

Docks for external graphical processor units

Selective endpoint isolation for self-healing in a cache and memory coherent system

Software deployment over communication fabrics

Conical scan weather radar

Electronic control unit, frame generating method, and non-transitory computer-readable recording medium storing a program

Flattening portal bridge

Configurable multi-function PCIe endpoint controller in an SoC

Flit-based packetization

Object-based load balancing approaches in distributed storage system

Dynamic random access memory applied to an embedded display port

Operation accelerator, switch, task scheduling method, and processing system

Data transmission method and apparatus used in virtual switch technology

Method and system for facilitating a high-capacity object storage system with configuration agility and mixed deployment flexibility

System and method for extended peripheral component interconnect express fabrics

Systems and methods for generating customized filtered-and-partitioned market-data feeds

Memory hub providing cache coherency protocol system method for multiple processor sockets comprising multiple XPUs

Data processing system and method for configuring and operating a data processing system

Virtual healthcare communication platform

Cryptographic data integrity protection

Modular object-oriented digital sub-system architecture with primary sequence control and synchronization

Secure and power efficient audio data processing

Storage device and a storage system including the same

Method for controlling storage device

Expansion fan device with adjustable fan

Storage device, nonvolatile memory system including memory controller, and operating method of the storage device for independently performing a relink to a host device

Apparatus and methods for managing packet transfer across a memory fabric physical layer interface

Unified network interface for industrial networks

Route demultiplexed signal pairs

TEST METHOD, SYSTEM, READABLE STORAGE MEDIUM AND ELECTRONIC DEVICE FOR PROCESS CONTROL

Method and system for predicting resource reallocation in a resource pool

Method and system for a resource reallocation of computing resources in a resource pool using a ledger service

Safe peripheral device communications

Signal tuning method for peripheral component interconnect express and computer system using the same

System and method for implementing trusted execution environment on PCI device

Updating host discovery records based on target reconfiguration

Adaptive transmitter preset mechanism in PCIe link equalization procedure

Network and edge acceleration tile (NEXT) architecture

High performance interconnect

Method and system for signing output using a kernel

Transient software error handling in a distributed system

Method for data transmission between a peripheral device and a data acquisition unit, peripheral device and data acquisition unit

Link interface