ClassID:

191216

G06F2207/3812 - CPC Classification

Classification description:

Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled; Indexing scheme relating to groups -; Details concerning the type of numbers or the way they are handled Devices capable of handling different types of numbers

Sub-classes:
Recent Application in this class:
#1
20250245286
2025-07-31

IN-MEMORY MATRIX MULTIPLICATION WITH BINARY COMPLEMENT INPUTS

#2
20220342641
2022-10-27

Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits

#3
20220188968
2022-06-16

METHOD AND APPARATUS FOR GENERATING ARCHITECTURE SPECIFIC CONVOLUTION GRADIENT KERNELS

#4
20220188074
2022-06-16

AI CALCULATION CIRCUIT

#5
20200334016
2020-10-22

Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits

#6
20190129718
2019-05-02

Packed 16 bits instruction pipeline

#7
20190056916
2019-02-21

Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits

#8
20160098249
2016-04-07

Decimal and binary floating point arithmetic calculations

#9
20130138711
2013-05-30

Shared integer, floating point, polynomial, and vector multiplier

#10
20120265964
2012-10-18

Data processing device and data processing method thereof

#11
20120215826
2012-08-23

System and method to implement a matrix multiply unit of a broadband processor

#12
20110131395
2011-06-02

Method and processor unit for implementing a characteristic-2-multiplication

#13
20100306292
2010-12-02

DSP engine with implicit mixed sign operands

#14
20100250635
2010-09-30

VECTOR MULTIPLICATION PROCESSING DEVICE, AND METHOD AND PROGRAM THEREOF

#15
20090094309
2009-04-09

System and method to implement a matrix multiply unit of a broadband processor

#16
20080243976
2008-10-02

MULTIPLY AND MULTIPLY AND ACCUMULATE UNIT

#17
20070266073
2007-11-15

Method and apparatus for decimal number addition using hardware for binary number operations

#18
20060253521
2006-11-09

High-speed integer multiplier unit handling signed and unsigned operands and occupying a small area

#19
20060173946
2006-08-03

Common shift-amount calculation for binary and hex floating point

#20
20050273485
2005-12-08

Polynomial and integer multiplication

#21
17060621
2022-04-12

Multimodal digital multiplication circuits and methods

#22
16137195
2020-11-10

Multimodal digital multiplication circuits and methods