191236 ⎘
Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled; Indexing scheme relating to groups -; Details; Special constructional features; Pipelining Systolic array
Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Array Matrix Multipliers
#2Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Array Matrix Multipliers
#3Sparse matrix multiplication acceleration mechanism
#4SYSTOLIC ARRAY CELLS WITH MULTIPLE ACCUMULATORS
#5Calculation circuit and deep learning system including the same
#6Sparse matrix multiplication acceleration mechanism
#7Memory-size- and bandwidth-efficient method for feeding systolic array matrix multipliers
#8PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS
#9Pipelined cascaded digital signal processing structures and methods
#10Pipelined cascaded digital signal processing structures and methods
#11Low complexity bit-parallel systolic architecture for computing C+AB, AB, C+AB2 or AB2 over a class of GF (2m)