ClassID:

191651

G06F2217/06 - CPC Classification

Classification description:

Recent Application in this class:
#1
20210143095
2021-05-13

FEOL interconnect used as capacitance over fins instead of gates

#2
20210141869
2021-05-13

Automated Analysis of Mechanical Designs

#3
20210089629
2021-03-25

Inertia scaling based on neighboring bodies

#4
20210089628
2021-03-25

Minimization function for friction solving

#5
20210081510
2021-03-18

Pre-characterization mixed-signal design, placement, and routing using machine learning

#6
20210081504
2021-03-18

System and method for construction cost estimation for non-computer aided design (CAD) files

#7
20210073349
2021-03-11

Method and system for part design using heterogeneous constraints

#8
20210073347
2021-03-11

Net routing for integrated circuit (IC) design

#9
20200356638
2020-11-12

Orientation optimization in components fabricated with anisotropic material properties

#10
20200311221
2020-10-01

Multi-cycle latch tree synthesis

#11
20200311218
2020-10-01

Timing model, timing model building method, and related top-level analysis method

#12
20200294868
2020-09-17

Device/health of line (HOL) aware eBeam based overlay (EBO OVL) structure

#13
20200293625
2020-09-17

Method and system for circuiting in heat exchangers

#14
20200233929
2020-07-23

Distributed attitude control system for reconfigurable spacecraft composed of joined entities with compliant coupling

#15
20200210535
2020-07-02

Method and system for automated design and design-space exploration

#16
20200209832
2020-07-02

Method and system for hierarchical multi-scale part design with the aid of a digital computer

#17
20200201947
2020-06-25

Computer-Implemented Method Of Estimating A Mass Distribution Of A Physical Product

#18
20200167441
2020-05-28

Managing feedthrough wiring for integrated circuits

#19
20200159882
2020-05-21

Propagating constants of structured soft blocks while preserving the relative placement structure

#20
20200134119
2020-04-30

Pin access hybrid cell height design

#21
20200134105
2020-04-30

Method to map convolutional layers of deep neural network on a plurality of processing elements with SIMD execution units, private memories, and connected as a 2D systolic processor array

#22
20200117768
2020-04-16

Buffer-bay placement in an integrated circuit

#23
20200089832
2020-03-19

Application- or algorithm-specific quantum circuit design

#24
20200082049
2020-03-12

Semiconductor process modeling to enable skip via in place and route flow

#25
20200082048
2020-03-12

Semiconductor process modeling to enable skip via in place and route flow

#26
20200082047
2020-03-12

Semiconductor process modeling to enable skip via in place and route flow

#27
20200082046
2020-03-12

Constrained cell placement

#28
20200074276
2020-03-05

Providing Real-Time Predictive Feedback During Logic Design

#29
20200074043
2020-03-05

Method for improved cut metal patterning

#30
20200074017
2020-03-05

Systems and methods for SMT processes using uninterpreted function symbols

#31
20200065429
2020-02-27

Optimizing level-set structural design of flexure mechanism

#32
20200057826
2020-02-20

Method, computer program product and apparatus for providing a building options configurator

#33
20200050726
2020-02-13

Smart placement, visualization and optimization methodology for component placement and planning

#34
20200042669
2020-02-06

Methods and apparatuses to produce fluid control device components and related fluid control devices

#35
20200042662
2020-02-06

Method for automatic detection of a functional primitive in a model of a hardware system

#36
20200026818
2020-01-23

Less-pessimistic static timing analysis for synchronous circuits

#37
20200019652
2020-01-16

Integrated circuit design model splitting for formal verification

#38
20200019649
2020-01-16

Designing a 3D modeled object representing a mechanical structure

#39
20200004912
2020-01-02

Method and system of revising a layout diagram

#40
20190392106
2019-12-26

Optimizing library cells with wiring in metallization layers

#41
20190392104
2019-12-26

Systems and methods for inter-die block level design

#42
20190384885
2019-12-19

Integrated circuit (IC) design systems and methods using single-pin imaginary devices

#43
20190384349
2019-12-19

System and method for a hybrid current-mode and voltage-mode integrated circuit

#44
20190377844
2019-12-12

Pre-step co-simulation method and device

#45
20190377838
2019-12-12

Method and system for designing a distributed heterogeneous computing and control system

#46
20190377834
2019-12-12

Method and system for multiple views computer-aided-design including propagation of edit operations across views while ensuring constraints consistency

#47
20190376788
2019-12-12

Method for selecting wave height threshold

#48
20190370430
2019-12-05

Integrated circuit design system and method

#49
20190362041
2019-11-28

Reliability robust design method for multiple failure modes of ultra-deep well hoisting container

#50
20190332738
2019-10-31

Semiconductor process modeling to enable skip via in place and route flow

#51
20190332091
2019-10-31

Systems and methods for customization of objects in additive manufacturing

#52
20190325095
2019-10-24

Constructing flexible space-filling designs for computer experiments

#53
20190318057
2019-10-17

Voltage drop assisted power-grid augmentation

#54
20190311085
2019-10-10

Modifying circuits based on timing reports for critical paths

#55
20190311071
2019-10-10

Incorporation of process variation contours in design rule and risk estimation aspects of design for manufacturability to increase fabrication yield

#56
20190308289
2019-10-10

System and method for fixture form-closure determination for part manufacturing with the aid of a digital computer

#57
20190303707
2019-10-03

Automated accurate viable solar area determination

#58
20190303523
2019-10-03

Multi-tier co-placement for integrated circuitry

#59
20190302737
2019-10-03

Method and assembly for forming a building element

#60
20190294755
2019-09-26

Automatic airfoil and wing design based on dynamic modeling of structural and aerodynamic performance

#61
20190294744
2019-09-26

Resistance-based memory compiler

#62
20190278876
2019-09-12

Symbiotic modeling system and method

#63
20190272356
2019-09-05

Simplifying designs of mechanical assemblies via generative component consolidation

#64
20190271967
2019-09-05

Method for fabricating a physical simulation device, simulation device and simulation system

#65
20190266308
2019-08-29

Integrated circuit design

#66
20190251215
2019-08-15

ACCURATE ESTIMATION OF UPPER ATMOSPHERIC DENSITY USING SATELLITE OBSERVATIONS

#67
20190251211
2019-08-15

Computer executing method, clock data processing system and computer readable storage medium

#68
20190236237
2019-08-01

Calibration of directed self-assembly models using programmed defects of varying topology

#69
20190236221
2019-08-01

Methods for combinatorial constraint in topology optimization using shape transformation

#70
20190236220
2019-08-01

Methods for topology optimization using a membership variable

#71
20190220565
2019-07-18

Slack time recycling

#72
20190213300
2019-07-11

Constraint-oriented programming approach to mechanical assembly design

#73
20190205497
2019-07-04

Circuit design method and associated computer program product

#74
20190197215
2019-06-27

Triple and quad coloring of shape layouts

#75
20190188337
2019-06-20

Supervised automatic roof modeling

#76
20190179985
2019-06-13

A DESIGN OPTIMIZATION METHOD FOR PREVENTING WRINKLING OF STRETCHED MEMBRANE STRUCTURES

#77
20190171788
2019-06-06

Integrated circuit structure

#78
20190171783
2019-06-06

Systems and methods for top level integrated circuit design

#79
20190163861
2019-05-30

Integrated device and method of forming the same

#80
20190163860
2019-05-30

Wirelength distribution schemes and techniques

#81
20190163854
2019-05-30

Enabling automatic staging for nets or net groups with VHDL attributes

#82
20190160898
2019-05-30

Tread pattern generation method for generating tread pattern of tire to reduce noise with higher precision

#83
20190155969
2019-05-23

Hybrid method of assessing and predicting athletic performance

#84
20190155966
2019-05-23

COMPUTER-IMPLEMENTED SYNTHESIS OF A MECHANICAL STRUCTURE USING A DIVERGENT SEARCH ALGORITHM IN CONJUNCTION WITH A CONVERGENT SEARCH ALGORITHM

#85
20190147317
2019-05-16

Automatic assembly mate creation for frequently-used components

#86
20190147133
2019-05-16

Variant cell height integrated circuit design

#87
20190147121
2019-05-16

Efficient mechanism for interactive fault analysis in formal verification environment

#88
20190147119
2019-05-16

Techniques for automatically generating designs having characteristic topologies for urban design projects

#89
20190147118
2019-05-16

Techniques for automatically analyzing competing design objectives when generating designs for urban design projects

#90
20190147116
2019-05-16

Generative design pipeline for urban and neighborhood planning

#91
20190138673
2019-05-09

Growth-Based Design System

#92
20190121925
2019-04-25

3D tolerance analysis system and methods

#93
20190108293
2019-04-11

Methods for automated hardware system synthesis

#94
20190095573
2019-03-28

Integrated circuit layout methods, structures, and systems

#95
20190095567
2019-03-28

Integrated circuit with peek and poke protection circuitry for a multi-tenant usage model

#96
20190095303
2019-03-28

SYSTEMS AND METHODS FOR MEASURING ERROR IN TERMS OF UNIT IN LAST PLACE

#97
20190087528
2019-03-21

Method for resisting dynamic load in high temperature pipeline

#98
20190087516
2019-03-21

CONCURRENTLY OPTIMIZED SYSTEM-ON-CHIP IMPLEMENTATION WITH AUTOMATIC SYNTHESIS AND INTEGRATION

#99
20190087511
2019-03-21

DESIGN-INFORMATION PROCESSING APPARATUS AND NON-TRANSITORY COMPUTER READABLE MEDIUM

#100
20190080040
2019-03-14

Integration method for accurate modeling and analysis and reliability-based design optimization of variable stiffness composite plate and shell structures

#101
20190080037
2019-03-14

Method, system, and storage medium for engineering change order scheme in circuit design

#102
20190073441
2019-03-07

Support apparatus and design support method

#103
20190064770
2019-02-28

Standard cells and variations thereof within a standard cell library

#104
20190042689
2019-02-07

Alignment key design rule check for correct placement of abutting cells in an integrated circuit

#105
20190042683
2019-02-07

Method and apparatus for performing synthesis for field programmable gate array embedded feature placement

#106
20190042680
2019-02-07

Method for rigidity enhancement and weight reduction using laser peening

#107
20190034574
2019-01-31

Partitioning in post-layout circuit simulation

#108
20190026402
2019-01-24

GENERATIVE SPACE PLANNING IN ARCHITECTURAL DESIGN FOR EFFICIENT DESIGN SPACE EXPLORATION

#109
20190026401
2019-01-24

GENERATIVE SPACE PLANNING IN ARCHITECTURAL DESIGN FOR EFFICIENT DESIGN SPACE EXPLORATION

#110
20180369813
2018-12-27

Customizable microfluidic device with programmable microfluidic nodes

#111
20180365363
2018-12-20

System, method and computer product for enhanced decoupling capacitor implementation

#112
20180365359
2018-12-20

Method to automatically generate and promote timing constraints in a Synopsys Design Constraint format

#113
20180365343
2018-12-20

Adding constraints between components of a computer-aided design (CAD) model

#114
20180365341
2018-12-20

Three-Dimensional Cad System Device, and Knowledge Management Method Used in Three-Dimensional Cad

#115
20180357605
2018-12-13

SDA Collaboration

#116
20180349546
2018-12-06

Data processing system and method for assembling components in a computer-aided design (CAD) environment

#117
20180341724
2018-11-29

Verification support apparatus and design verification support method

#118
20180336304
2018-11-22

Method for compression of emulation time line in presence of dynamic re-programming of clocks

#119
20180330034
2018-11-15

Constrained cell placement

#120
20180329313
2018-11-15

Method and system for overlay control

#121
20180322236
2018-11-08

Field-effect transistor placement optimization for improved leaf cell routability

#122
20180322235
2018-11-08

Field-effect transistor placement optimization for improved leaf cell routability

#123
20180322234
2018-11-08

Prediction of process-sensitive geometries with machine learning

#124
20180321824
2018-11-08

Systems and methods for layout objects selection and replication via a graphic-based layout editor

#125
20180321822
2018-11-08

SYSTEMS AND METHODS FOR SELECTION AND OPERATION ON MULTIPLE GROUPS OF LAYOUT OBJECTS VIA A GRAPHIC-BASED LAYOUT EDITOR

#126
20180314917
2018-11-01

Learning an autoencoder

#127
20180314771
2018-11-01

Computer-implemented method and computing system for designing integrated circuit by considering timing delay

#128
20180300434
2018-10-18

Pattern centric process control

#129
20180300432
2018-10-18

SYSTEM AND METHOD FOR MODELING STAIRS

#130
20180293345
2018-10-11

Techniques for optimizing dual track routing

#131
20180293331
2018-10-11

DESIGN METHOD FOR CHOOSING SPECTRAL SELECTIVITY IN MULTISPECTRAL AND HYPERSPECTRAL SYSTEMS

#132
20180290070
2018-10-11

Method and system for designing and producing a user-defined toy construction element

#133
20180285486
2018-10-04

Method to synthesize a cross bar switch in a highly congested environment

#134
20180285483
2018-10-04

Device and method for detecting points of failures

#135
20180267676
2018-09-20

Example-based ranking techniques for exploring design spaces

#136
20180260512
2018-09-13

INTEGRATED CIRCUIT LAYOUT DESIGN METHODOLOGY WITH PROCESS VARIATION BANDS

#137
20180253523
2018-09-06

Technique for distributing routing into superfluous metal section of an integrated circuit

#138
20180246997
2018-08-30

Method, design program, and design apparatus of a high level synthesis process of a circuit

#139
20180239847
2018-08-23

Maintaining computational flow in a data-dependent constraint network

#140
20180232481
2018-08-16

Data processing system to implement wiring/silicon blockages via parameterized cells

#141
20180232468
2018-08-16

METHODS AND SYSTEMS FOR TIMING CONSTRAINT GENERATION IN IP/SoC DESIGN

#142
20180225399
2018-08-09

Automatic timing-sensitive circuit extraction

#143
20180218106
2018-08-02

Power grid insertion technique

#144
20180217261
2018-08-02

Apparatus and method for range measurement

#145
20180210995
2018-07-26

Electromigration check in layout design using compiled rules library

#146
20180210987
2018-07-26

Techniques for statistical frequency enhancement of statically timed designs

#147
20180210973
2018-07-26

METHODS AND SYSTEMS FOR IMPROVING USER EXPERIENCE OF AN ELECTRONIC DEVICE

#148
20180203963
2018-07-19

Three-dimensional NoC reliability evaluation

#149
20180203959
2018-07-19

VIRTUAL SENSOR FOR VIRTUAL ASSET

#150
20180196907
2018-07-12

Architecture generating device

#151
20180188554
2018-07-05

Conductive film, display device equipped with same, and method for determining pattern of conductive film

#152
20180181684
2018-06-28

Concurrently optimized system-on-chip implementation with automatic synthesis and integration

#153
20180181682
2018-06-28

Replica selection

#154
20180173827
2018-06-21

Automatic partitioning of a 3D scene into a plurality of zones processed by a computing resource

#155
20180173824
2018-06-21

A METHOD AND APPARATUS FOR PERFORMING A MODEL-BASED FAILURE ANALYSIS OF A COMPLEX INDUSTRIAL SYSTEM

#156
20180173815
2018-06-21

Constructing multi-element features using a 3D CAD system

#157
20180165755
2018-06-14

System and method for designing, receiving order of, and placing production-order of custom-made furniture and program therefor

#158
20180165477
2018-06-14

Method to protect an IC layout

#159
20180165408
2018-06-14

FINITE ELEMENT SIMULATION DEVICE AND METHOD FOR CAR BODY LOCAL STRUCTURE INSTABILITY OF HIGH-SPEED MOTOR TRAIN UNIT

#160
20180165406
2018-06-14

System and method for assigning color pattern

#161
20180165405
2018-06-14

Timing based net constraints tagging with zero wire load validation

#162
20180165403
2018-06-14

Layout for semiconductor device including via pillar structure

#163
20180165400
2018-06-14

Method and computer program for determining a placement of at least one circuit for a reconfigurable logic device

#164
20180165397
2018-06-14

Target optimization method for improving lithography printability

#165
20180157779
2018-06-07

Programmable logic integrated circuit, design support system, and configuration method

#166
20180157778
2018-06-07

SIDE-BY-SIDE INTERACTIVE CIRCUIT DESIGN PANEL

#167
20180150585
2018-05-31

Method for layout generation with constrained hypergraph partitioning

#168
20180150576
2018-05-31

Resistance-based memory compiler

#169
20180149886
2018-05-31

Method for manufacturing a spectacle frame adapted to a spectacle wearer

#170
20180144089
2018-05-24

Triple and quad coloring of shape layouts

#171
20180144088
2018-05-24

Triple and quad coloring shape layouts

#172
20180137226
2018-05-17

Methods for verifying retimed circuits with delayed initialization

#173
20180129771
2018-05-10

Support method, and information processing apparatus

#174
20180129767
2018-05-10

Analog centric current modeling within a digital testbench in mixed-signal verification

#175
20180121575
2018-05-03

Critical path straightening system based on free-space aware and timing driven incremental placement

#176
20180121569
2018-05-03

DEVICE DESIGN RECEIVING SYSTEM

#177
20180113974
2018-04-26

Neural Network Based Prediction of PCB Glass Weave Induced Skew

#178
20180107781
2018-04-19

Automation generation of test layouts for verifying a DRC deck

#179
20180096086
2018-04-05

Dynamic frequency boosting exploiting path delay variability in integrated circuits

#180
20180089340
2018-03-29

Integrated circuit design using generation and instantiation of circuit stencils

#181
20180082003
2018-03-22

Circuit design analyzer

#182
20180075179
2018-03-15

Method for transistor design with considerations of process, voltage and temperature variations

#183
20180075178
2018-03-15

Glitch-aware phase algebra for clock analysis

#184
20180075169
2018-03-15

Spatial constraint based triangular mesh operations in three dimensions

#185
20180068045
2018-03-08

Method for optimizing the design of micro-fluidic devices

#186
20180068036
2018-03-08

Reuse of extracted layout-dependent effects for circuit design using circuit stencils

#187
20180039722
2018-02-08

Circuit design support apparatus, circuit design support method, and computer readable medium

#188
20180037339
2018-02-08

Component design system for generating aircraft component designs

#189
20180011951
2018-01-11

ASIC design methodology for converting RTL HDL to a light netlist

#190
20170371997
2017-12-28

Sharing global route topologies in detailed routing

#191
20170351801
2017-12-07

Use of net-based target congestion ratios in global routing

#192
20170344670
2017-11-30

Asynchronous pipeline circuit

#193
20170337321
2017-11-23

Systems and methods for automatic determination of layout constraints

#194
20170329889
2017-11-16

Method for verifying a layout designed for a semiconductor integrated circuit and a computer system for performing the same

#195
20170320179
2017-11-09

System and method for determining spatial locations of fixture element fixturing points on a part to be manufactured with the aid of a digital computer

#196
20170316120
2017-11-02

Method and apparatus for implementing a system-level design tool for design planning and architecture exploration

#197
20170308636
2017-10-26

METHODS AND APPARATUS FOR A COIL DESIGNER

#198
20170308623
2017-10-26

Systems and methods for optimizing component placement in a battery design

#199
20170300608
2017-10-19

METHOD, SYSTEM AND PROGRAM PRODUCT FOR SADP-FRIENDLY INTERCONNECT STRUCTURE TRACK GENERATION

#200
20170286583
2017-10-05

Method for optimizing the design of micro-fluidic devices

#201
20170284174
2017-10-05

Optimal well placement under constraints

#202
20170277822
2017-09-28

Printed circuit board design for manufacturing across multiple suppliers

#203
20170255742
2017-09-07

Method and system for verifying layout of integrated circuit including vertical memory cells

#204
20170255713
2017-09-07

System and method for solving and enforcing associative constraints

#205
20170249416
2017-08-31

Integrated circuit design using generation and instantiation of circuit stencils

#206
20170249400
2017-08-31

Reuse of extracted layout-dependent effects for circuit design using circuit stencils

#207
20170243935
2017-08-24

Designing and fabricating semiconductor devices with specific terrestrial cosmic ray (TCR) ratings

#208
20170235866
2017-08-17

Method wherein test cells and dummy cells are included into a layout of an integrated circuit

#209
20170220707
2017-08-03

Identifying bugs in a counter using formal

#210
20170212903
2017-07-27

Methods and systems for searching computer-aided design data

#211
20170193378
2017-07-06

System and method for rapid and robust uncertainty management during multidisciplinary analysis

#212
20170193377
2017-07-06

System and method for rapid and robust uncertainty management during multidisciplinary analysis

#213
20170180756
2017-06-22

Distributed clash and snapping

#214
20170177783
2017-06-22

Multilevel via placement with improved yield in dual damascene interconnection

#215
20170154146
2017-06-01

Restricted region transform method and restricted region transform device

#216
20170154143
2017-06-01

Static timing analysis in circuit design

#217
20170148779
2017-05-25

Cell circuit and layout with linear finfet structures

#218
20170147740
2017-05-25

Multiple patterning layout decomposition considering complex coloring rules

#219
20170147715
2017-05-25

DESIGN SUPPORT DEVICE, METHOD, AND PROGRAM RECORD MEDIUM

#220
20170140087
2017-05-18

Method and device for chip integration and storage medium

#221
20170140073
2017-05-18

ARCHITECTURE AND DESIGN AUTOMATION OF HIGH PERFORMANCE LARGE ADDERS AND COUNTERS ON FPGA THROUGH CONSTRAINED PLACEMENT

#222
20170140072
2017-05-18

METHOD AND SYSTEM FOR DETERMINING A CONFIGURATION OF A MODEL HAVING A COLLECTION OF ENTITIES AND SATISFYING A SET OF CONSTRAINTS

#223
20170124243
2017-05-04

Layout optimization of a main pattern and a cut pattern

#224
20170124241
2017-05-04

Timing exact design conversions from FPGA to ASIC

#225
20170124233
2017-05-04

Methods for orienting material physical properties using constraint transformation and isoparametric shape functions

#226
20170116354
2017-04-27

Network logic synthesis

#227
20170103236
2017-04-13

Vanishable logic to enhance circuit security

#228
20170103145
2017-04-13

Rule based completion of maps with partial data

#229
20170098029
2017-04-06

Manufacturing method for a semiconductor device, pattern generating method and nontransitory computer readable medium storing a pattern generating program

#230
20170091578
2017-03-30

Automated accurate viable solar area determination

#231
20170091370
2017-03-30

Cross-hierarchy interconnect adjustment for power recovery

#232
20170091367
2017-03-30

Alternative hierarchical views of a circuit design

#233
20170083662
2017-03-23

Timing constraints formulation for highly replicated design modules

#234
20170080643
2017-03-23

System and method for distributing multiple layers of a composite within a structural volume containing an inclusion

#235
20170076018
2017-03-16

Synthesis tuning system for VLSI design optimization

#236
20170075225
2017-03-16

Method for determining the parameters of an IC manufacturing process by a differential procedure

#237
20170062404
2017-03-02

Via placement within an integrated circuit

#238
20170061060
2017-03-02

Timing constraints formulation for highly replicated design modules

#239
20170053058
2017-02-23

MODEL-BASED RULE TABLE GENERATION

#240
20170053057
2017-02-23

Systems and methods for group constraints in an integrated circuit layout

#241
20170053045
2017-02-23

Reciprocal quantum logic (RQL) circuit synthesis

#242
20170046776
2017-02-16

System and method for designing, receiving order of, and placing production-order of custom-made furniture and program therefor

#243
20170046471
2017-02-16

Polygon-based geometry classification for semiconductor mask inspection

#244
20170046455
2017-02-16

Method and apparatus for implementing a system-level design tool for design planning and architecture exploration

#245
20170038767
2017-02-09

Systems and methods for customization of objects in additive manufacturing

#246
20170011160
2017-01-12

Methods of generating integrated circuit layout using standard cell library

#247
20170011137
2017-01-12

USER INTERFACES FOR DESIGNING OBJECTS

#248
20170004250
2017-01-05

Integrated circuit layout design methodology with process variation bands

#249
20160371411
2016-12-22

Scaling of Integrated Circuit Design Including High-Level Logic Components

#250
20160371397
2016-12-22

Method and apparatus for automatically assembling components in a computer-aided design (CAD) environment

#251
20160371333
2016-12-22

SYSTEM AND METHOD FOR COMPUTATIONAL PLANNINGIN A DATA-DEPENDENT CONSTRAINT MANAGEMENT SYSTEM

#252
20160357881
2016-12-08

Method, computer program product and apparatus for providing a building options configurator

#253
20160350445
2016-12-01

Arrayed imaging systems having improved alignment and associated methods

#254
20160350080
2016-12-01

Graphical specification and constraint language for developing programs for hardware implementation and use

#255
20160314223
2016-10-27

Deadlock detection in hardware design using assertion based verification

#256
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2016-10-20

Methods for designing and manufacturing transformers

#257
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2016-10-20

System, method and computer-accessible medium for security-centric electronic system design

#258
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2016-10-13

Collaborative generation of configuration technical data for a product to be manufactured

#259
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2016-09-29

Method of design and manufacturing of aircraft structural object

#260
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2016-09-29

Semiconductor device design methods and conductive bump pattern enhancement methods

#261
20160260796
2016-09-08

Die including a high voltage capacitor

#262
20160246899
2016-08-25

Multi-user cloud parametric feature-based 3D CAD system

#263
20160217220
2016-07-28

Method for representing and generating a flat pattern for a composite ply that folds over itself

#264
20160210387
2016-07-21

Calculating circuit-level leakage using three dimensional technology computer aided design and a reduced number of transistors

#265
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2016-07-21

Method, computer program product and apparatus for providing a building options configurator

#266
20160179988
2016-06-23

Simulation of resizable bodies using a rigid body solver

#267
20160147910
2016-05-26

Device placement automatic calculation apparatus

#268
20160117418
2016-04-28

Rule-based constraint interaction in geometric models

#269
20160110489
2016-04-21

Methods, apparatus, and system for using filler cells in design of integrated circuit devices

#270
20160103948
2016-04-14

Resistive capacitance determination method for multiple-patterning-multiple spacer integrated circuit layout

#271
20160078162
2016-03-17

Conditional phase algebra for clock analysis

#272
20160070848
2016-03-10

Method of decomposing layout of semiconductor device for quadruple patterning technology process and method of manufacturing semiconductor device using the same

#273
20160070667
2016-03-10

System for designing network on chip interconnect arrangements

#274
20160070255
2016-03-10

Associating computer-executable objects with three-dimensional spaces within an architectural design environment

#275
20160063170
2016-03-03

MEMORY REDUNDANCY REDUCTION

#276
20160063160
2016-03-03

System for and method of checking joule heating of an integrated circuit design

#277
20160055290
2016-02-25

Integrated circuit and routing design of the same

#278
20160055285
2016-02-25

Methods of generating integrated circuit layout using standard cell library

#279
20160048611
2016-02-18

System, method, apparatus, and computer program product for generation of an elevation plan for a computing system

#280
20160034629
2016-02-04

Method of converting between non-volatile memory technologies and system for implementing the method

#281
20160034624
2016-02-04

Optimizing constraint solving by rewriting at least one bit-slice constraint

#282
20150379190
2015-12-31

MEMS modeling system and method

#283
20150379174
2015-12-31

Variation modeling

#284
20150370940
2015-12-24

Clock-gating phase algebra for clock analysis

#285
20150370939
2015-12-24

Circuit design analyzer

#286
20150363541
2015-12-17

EDA tool and method for conflict detection during multi-patterning lithography

#287
20150356235
2015-12-10

Generating a semiconductor component layout

#288
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2015-12-10

Method and System for Generating a Circuit Design, Method for Calibration of an Inspection Apparatus and Method for Process Control and Yield Management

#289
20150356222
2015-12-10

System and method for reducing power of a circuit using critical signal analysis

#290
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2015-12-03

Cell-level signal electromigration

#291
20150347656
2015-12-03

System design management

#292
20150347633
2015-12-03

System design management

#293
20150347632
2015-12-03

System design management

#294
20150339626
2015-11-26

Product intelligence engine

#295
20150333707
2015-11-19

Method for high-frequency amplifier using power gain-boosting technique

#296
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2015-11-19

Insulation distance check device

#297
20150331974
2015-11-19

Product configuration

#298
20150324507
2015-11-12

PRINTED CIRCUIT BOARD DESIGN VERIFICATION SYSTEM, PRINTED CIRCUIT BOARD DESIGN VERIFICATION METHOD, AND RECORDING MEDIUM

#299
20150324487
2015-11-12

System and method for designing and validating computing systems

#300
20150302969
2015-10-22

Transformer with improved power handling capacity