Method and equipment for defining a supporting structure for a three-dimensional object to be made through stereolithography

Complex feature cloning in additive manufacturing datasets

Method and system for manufacturing an integrated circuit in consideration of a local layout effect

Population of an eye model for optimizing spectacle lenses with measurement data

Method and device for generating a sectional view of a body of a vehicle

Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same

Creating knowledge base for optical proximity correction to reduce sub-resolution assist feature printing

ACCOMMODATING ENGINEERING CHANGE ORDERS IN INTEGRATED CIRCUIT DESIGN

ACCOMMODATING ENGINEERING CHANGE ORDERS IN INTEGRATED CIRCUIT DESIGN

Concurrently optimized system-on-chip implementation with automatic synthesis and integration

Computing system for performing colorless routing for quadruple patterning lithography

Pin-based noise characterization for silicon compiler

Corner database generator

METHOD AND EQUIPMENT FOR GENERATING A NUMERICAL REPRESENTATION OF A THREE-DIMENSIONAL OBJECT, SAID NUMERICAL REPRESENTATION BEING SUITED TO BE USED FOR MAKING SAID THREE-DIMENSIONAL OBJECT THROUGH STEREOLITHOGRAPHY

ESD protection circuit cell

Method to protect an IC layout

System and method for assigning color pattern

Semiconductor device with fill cells

Virtual hierarchical layer patterning

SKETCH-BASED 3D MODELING SYSTEM

Efficient execution of alternating automaton representing a safety assertion for a circuit

Layout checking system and method

Method of decomposing a layout for multiple-patterning lithography

Method for layout generation with constrained hypergraph partitioning

Method of macro placement and a non-transitory computer readable medium thereof

Orientation of a real object for 3D printing

Method for manufacturing a spectacle frame adapted to a spectacle wearer

Assistant pattern for measuring critical dimension of main pattern in semiconductor manufacturing

Tool for modular circuitboard design

Method and layout of an integrated circuit

Modeling Deformation Due To Surface Oxidation In Integrated Circuits

Method for determining a reliability parameter of a new technical system

Method and apparatus for calculating inserting force and removing force based on 3D modeling

Method of designing electroluminescent device, electroluminescent device manufactured with the design method, and method of manufacturing electroluminescent device with the design method

Method and system for partitioning circuit cells

DEVICE DESIGN SUPPORT APPARATUS, DEVICE DESIGN SUPPORT METHOD AND DEVICE DESIGN SUPPORT SYSTEM

DESIGN METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT LAYOUT AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME

Virtual cell model geometry compression

DEVICE DESIGN RECEIVING SYSTEM

Simulation of lithography using multiple-sampling of angular distribution of source radiation

Modified design rules to improve device performance

CUSTOMIZED HANDLE FOR ULTRASOUND PROBE

Methods of tuning current ratio in a current mirror for transistors formed with the same FEOL layout and a modified BEOL layout

Physically aware test patterns in semiconductor fabrication

Expansion of allowed design rule space by waiving benign geometries

Method for improving circuit layout for manufacturability

Method of optimizing a mask using pixel-based learning and method for manufacturing a semiconductor device using an optimized mask

Method, system and program product for identifying anomalies in integrated circuit design layouts

Method for designing and manufacturing custom-made furniture using computer, system, and program therefor

Method for analyzing an electromigration (EM) rule violation in an integrated circuit

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

Embedded security elements for digital models used in additive manufacturing

Method and system for pin layout

Multi-patterning graph reduction and checking flow method

METHOD AND SYSTEM FOR FABRICATING UNIQUE CHIPS USING A CHARGED PARTICLE MULTI-BEAMLET LITHOGRAPHY SYSTEM

Method for optimizing the design of micro-fluidic devices

Build synthesized soft arrays

THREE-DIMENSIONAL MODEL PRODUCTION DATA GENERATION APPARATUS, THREE-DIMENSIONAL MODEL PRODUCTION DATA GENERATION NON-TRANSITORY COMPUTER READABLE MEDIUM, THREE-DIMENSIONAL MODEL PRODUCTION DATA GENERATION METHOD, AND THREE-DIMENSIONAL MODEL

Hierarchical cascading in two-dimensional finite element method simulation of acoustic wave filter devices

Addressing of process and voltage points

Semiconductor device

Integrated circuit design layout optimizer based on process variation and failure mechanism

Systems and methods for cell abutment

Usage feedback loop for iterative design synthesis

Dual exposure patterning of a photomask to print a contact, a via or curvilinear shape on an integrated circuit

Method and computer-readable model for additively manufacturing ducting arrangement with injector assemblies forming a shielding flow of air

Component design system for generating aircraft component designs

System and method of designing integrated circuit by considering local layout effect

Managing custom REVIT inheritance-based assembly families for manufacturing

Process variability aware adaptive inspection and metrology

System and methods for designing and manufacturing a bespoke protective sports helmet

Defect inspection and repairing method and associated system and non-transitory computer readable medium

System and method for perforating redundant metal in self-aligned multiple patterning

Physically aware test patterns in semiconductor fabrication

Integrated circuit layout and method of configuring the same

Method for modeling a manufacturing process for a product

Nesting using rigid body simulation

Generation of a color of an object displayed on a GUI

Standard cell architecture for diffusion based on fin count

Method and recording medium of reducing chemoepitaxy directed self-assembled defects

Standard cell architecture for diffusion based on fin count

Optimizing Layout of Irregular Structures in Regular Layout Context

Feed-forward for silicon inspections (DFM2CFM : design to silicon) and feed-back for weakpoint predictor decks (CFM2DFM : silicon to design) guided by marker classification, sampling, and higher dimensional analysis

METHOD OF CALCULATING PROCESSED DEPTH AND STORAGE MEDIUM STORING PROCESSED-DEPTH CALCULATING PROGRAM

Controlled thin wall thickness of heat exchangers through modeling of additive manufacturing process

Lithography system, simulation apparatus, and pattern forming method

Real-time compounding 3D printer

Casting machine stock verification methods and systems

Wear indicator for a wear member of a tool

Integrated circuit manufacturing process for aligning threshold voltages of transistors

System and method for defect classification based on electrical design intent

Method and recording medium of reducing chemoepitaxy directed self-assembled defects

Integrated circuits and methods of design and manufacture thereof

System and method for electrical behavior modeling in a 3D virtual fabrication environment

Assessing performance of a hardware design using formal evaluation logic

Method and computer-readable model for additively manufacturing ducting arrangement for a gas turbine engine

Method for verifying a layout designed for a semiconductor integrated circuit and a computer system for performing the same

Method for triple-patterning friendly placement

Systems and methods for using multiple libraries with different cell pre-coloring

Accommodating engineering change orders in integrated circuit design

Accommodating engineering change orders in integrated circuit design

Method of generating modified layout and system therefor

Verification of hardware designs to implement floating point power functions

METHOD AND SYSTEM FOR MANUFACTURING COMPENSATOR FOR TOTAL BODY IRRADIATION USING CAMERA

METHOD FOR ANALYZING IR DROP AND ELECTROMIGRATION OF IC

METHODS AND APPARATUS FOR A COIL DESIGNER

Placement constraint method for multiple patterning of cell-based chip design

Method to optimize standard cells manufacturability

SYSTEM AND METHOD FOR DESIGNING A PRODUCT AND MANUFACTURING A PRODUCT

Integrated circuit performance modeling that includes substrate-generated signal distortions

Three-dimensional pattern risk scoring

System and process for evaluating and validating additive manufacturing operations

System and process for evaluating and validating additive manufacturing operations

System and process for evaluating and validating additive manufacturing operations

System and process for evaluating and validating additive manufacturing operations

System and process for evaluating and validating additive manufacturing operations

System and process for evaluating and validating additive manufacturing operations

Method for optimizing the design of micro-fluidic devices

Scheme and design markup language for interoperability of electronic design application tool and browser

APPARATUS AND METHOD FOR SUPPORTING DEVELOPMENT OF PRODUCTION LINE, AND COMPUTER READABLE MEDIUM STORING PROGRAM FOR SUPPORTING DEVELOPMENT OF PRODUCTION LINE

Modelling method and system

Digital last

Printed circuit board design for manufacturing across multiple suppliers

Integrated circuit and method of designing integrated circuit

Integrated circuit design systems and methods

Methods of rasterizing mask layout and methods of fabricating photomask using the same

Fragmentation point and simulation site adjustment for resolution enhancement techniques

Tool to provide integrated circuit masks with accurate dimensional compensation of patterns

Product customization

Layout Design Repair Using Pattern Classification

Lithography model for 3D features

Automated optical inspection of unit specific patterning

Rule checking for multiple patterning technology

Method and apparatus to determine a patterning process parameter, associated with a change in a physical configuration, using measured pixel optical characteristic values

Method and apparatus to determine a patterning process parameter using an asymmetric optical characteristic distribution portion

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Layout checking system and method

Method and system for quantifying the impact of features on composite components

Method for generating and using a two-dimensional drawing having three-dimensional orientation information

Method wherein test cells and dummy cells are included into a layout of an integrated circuit

HIGH STRENGTH SUBSTRUCTURE REINFORCEMENT FOR CROWNS AND BRIDGES

Integrated circuit cell library for multiple patterning

Sublaminate library generation for optimization of multi-panel composite parts

Integrated circuit manufacture using direct write lithography

Layer class relative density for technology modeling in IC technology

Rule and process assumption co-optimization using feature-specific layout-based statistical analyses

Method to improve transistor matching

Analyzing quantum information processing circuits

Ply optimization feasibility analysis for multi-layer composite parts

Method for printing three-dimensional parts with part strain orientation

B-rep design with face trajectories

3D resist profile aware resolution enhancement techniques

Method and system for transforming mesh for simulating manufacturing processes and products

Identifying bugs in a counter using formal

Jig information setting method and jig information setting device

LAYOUTS OF TRANSMISSION GATES AND RELATED SYSTEMS AND TECHNIQUES

Physical placement control for an integrated circuit based on state bounds file

Method, apparatus, and system for offset metal power rail for cell design

Method and device for predicting reliability failure rate of semiconductor integrated circuit and method of manufacturing the semiconductor integrated circuit

Incremental multi-patterning validation

Sampling for OPC building

Method of determining colorability of a semiconductor device and system for implementing the same

Technique for designing acoustic microwave filters using LCR-based resonator models

Three-dimensional printing based on a license

Three-dimensional printing based on a license

Multiple patterning method for semiconductor devices

Method for automating full-scale templates for positioning audio/video components

Semiconductor Chip Including Integrated Circuit Defined Within Dynamic Array Section

Method for selective re-routing of selected areas in a target layer and in adjacent interconnecting layers of an IC device

Method of designing electroluminescent device, electroluminescent device manufactured with the design method, and method of manufacturing electroluminescent device with the design method

Multilevel via placement with improved yield in dual damascene interconnection

Integrated Circuit Implementing Scalable Meta-Data Objects

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

Designing an outer surface of a composite part

Method of fabricating an integrated circuit with non-printable dummy features

Method of designing a semiconductor device, system for implementing the method and standard cell

USING THREE-DIMENSIONAL REPRESENTATIONS FOR DEFECT-RELATED APPLICATIONS

Detecting cut-outs

Cell circuit and layout with linear finfet structures

Method of forming pattern of semiconductor device from which various types of pattern defects are removed

Gas turbine engine

Minimizing harmful effects caused by reticle defects by re-arranging IC layout locally

Tool to provide integrated circuit masks with accurate dimensional compensation of patterns

Tool to provide integrated circuit masks with accurate dimensional compensation of patterns

Simultaneous multi-layer fill generation

Topography simulation of etching and/or deposition on a physical structure

Self-aligned metal cut and via for back-end-of-line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devices

Layout modification method and system

Etch variation tolerant optimization

Apparatus and method to predetermine a mechanical property of a three-dimensional object built by additive manufacturing

Systems and methods for designing and fabricating support structures for overhang geometries of parts in additive manufacturing

Methods of estimating a precursor shape for a part to be manufactured

Method and apparatus for optimizing refrigeration systems

Associating computer-executable objects with timber frames within an architectural design environment

Method for calculating the metrics of an IC manufacturing process

Characterizing cell using input waveforms with different tail characteristics

MASK MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING THE SAME

Microporous membrane for stereolithography resin delivery

Coaxial filter and method for manufacturing the same

Computer-implemented method for designing a manufacturable garment

Generating root cause candidates for yield analysis

Contact resistance mitigation

Method for determining the parameters of an IC manufacturing process by a differential procedure

Apparatus for generating assembly sequence and method for generating assembly sequence

Nesting using rigid body simulation

Modeling of interactions between formation and downhole drilling tool with wearflat

Delta offset based surface modeling

Generating final mask pattern by performing inverse beam technology process

Method for verifying a pattern of features printed by a lithography process

Process simulator, layout editor, and simulation system

Systems and methods for customization of objects in additive manufacturing

Semiconductor device

DESIGN AND FABRICATION OF COMPOSITE MATERIAL COMPONENTS

Statistical overlay error prediction for feed forward and feedback correction of overlay errors, root cause analysis and process control

Methods, systems, and devices for designing and manufacturing flank millable components

Methods of generating integrated circuit layout using standard cell library

Model for calculating a stochastic variation in an arbitrary pattern

Integrated circuit layout design methodology with process variation bands

Method for integrated circuit manufacturing

Netlist abstraction for circuit design floorplanning

Method of simultaneous lithography and etch correction flow

Methods of design rule checking of circuit designs

Process-induced asymmetry detection, quantification, and control using patterned wafer geometry measurements

Three-dimensional fabricating system, information processing apparatus, three-dimensional fabricating model arrangement method, and three-dimensional fabricating model arrangement program

Three-dimensional printing system including three-dimensional printing apparatus and support arrangement determining apparatus, and method of determining support arrangement

SYSTEM AND METHOD FOR CHEMICAL MECHANICAL PLANARIZATION PROCESS PREDICTION AND OPTIMIZATION

Methods for cell phasing and placement in dynamic array architecture and implementation of the same

METHOD AND APPARATUS FOR CHECKING THE BUILDABILITY OF A VIRTUAL PROTOTYPE

Layout optimization for integrated circuit design

Arrayed imaging systems having improved alignment and associated methods

Graphical specification and constraint language for developing programs for hardware implementation and use

Method, apparatus, and system for offset metal power rail for cell design

AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNING

Methods for providing macro placement of IC

Method wherein test cells and dummy cells are included into a layout of an integrated circuit

Method of fabricating a mask using common bias values in optical proximity correction

Printed circuit board fabrication processes and architecture including point-of-use design and fabrication capacity employing additive manufacturing

Multi-scale mesh modeling software products and controllers

Processor and method for executing wide operand multiply matrix operations

Layout design system, system and method for fabricating mask pattern using the same

Three-dimensional printing system, and method of printing a three-dimensional object

ADDITIVE MANUFACTURING LIFT AND PULL TOOL

Fragmentation point and simulation site adjustment for resolution enhancement techniques

System and method for optimization of an imaged pattern of a semiconductor device

Integrated circuits and methods of design and manufacture thereof

Scalable chip placement

Method of forming masks

NON-TOXIC, HIGHLY REPRESENTATIONAL VINYL FLOORING ARTICLE

Methodology to generate a guiding template for directed self-assembly

Testing of semiconductor devices and devices, and designs thereof

Method for implementing design-for-manufacturability checks

Metrology using overlay and yield critical patterns

Method and apparatus for design of a metrology target

Method and system for lithography process-window-maximizing optical proximity correction

Patterned substrate design for layer growth

Method, system and computer readable medium using stitching for mask assignment of patterns

Method for representing and generating a flat pattern for a composite ply that folds over itself

Method of identifying repeating design cells

Transistor plasma charging metal design rule generator

Transistor plasma charging eliminator

Method for integrated circuit manufacturing

Method of operating a microlithographic projection apparatus

Automated optical inspection of unit specific patterning

Method of designing an integrated circuit and computer program product

Dummy patterns

DRC-based hotspot detection considering edge tolerance and incomplete specification

Three-dimensional (3D) model file, and apparatus and method for providing 3D model file

Resistive capacitance determination method for multiple-patterning-multiple spacer integrated circuit layout

Integrated circuit and method of designing layout of integrated circuit

Enforcement of semiconductor structure regularity for localized transistors and interconnect

Method of simulating formation of lithography features by self-assembly of block copolymers

Fracturing a shell of a three-dimensional object

Associating computer-executable objects with three-dimensional spaces within an architectural design environment

Method of designing layout of integrated circuit and method of manufacturing integrated circuit

Methods of generating integrated circuit layout using standard cell library

Method of generating modified layout for RC extraction

Method for determining a sequence for drilling holes according to a pattern using global and local optimization

Threshold logic gates with resistive networks

IC layout adjustment method and tool for improving dielectric reliability at interconnects

Layout method for printed circuit board

Variation modeling

Method of fabricating an integrated circuit with non-printable dummy features

Support structures for additive manufacturing of solid models

Generating a semiconductor component layout

Method and System for Generating a Circuit Design, Method for Calibration of an Inspection Apparatus and Method for Process Control and Yield Management

Techniques for generating nanowire pad data from pre-existing design data

Virtual hierarchical layer propagation

Virtual cell model usage

Virtual cell model geometry compression

Virtual hierarchical layer patterning

Virtual hierarchical layer usage

Negative plane usage with a virtual hierarchical layer

Method and apparatus for dummy cell placement management

Net-voltage-aware optical proximity correction (OPC)

Expanded canonical forms of layout patterns

Methods for layout verification for polysilicon cell edge structures in FinFET standard cells using filters

Semiconductor overlay production system and method

Analyzing method and apparatus for optimizing welding position of structure

Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity