189523 ⎘
Methods or arrangements for processing data by operating upon the order or content of the data handled; Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices; Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination using programmable logic arrays
DEVICE AND METHOD WITH PROCESSING-IN-MEMORY
#2OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
#3CONSTANT MODULO VIA RECIRCULANT REDUCTION
#4OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
#5QUANTUM CIRCUIT OPTIMIZATION USING WINDOWED QUANTUM ARITHMETIC
#6Measurement based uncomputation for quantum circuit optimization
#7PARALLEL COMPUTATION OF A LOGIC OPERATION, INCREMENT, AND DECREMENT OF ANY PORTION OF A SUM
#8Embedded Arithmetic Blocks for Structured ASICs
#9Surface code computations using Auto-CCZ quantum states
#10Oblivious carry runway registers for performing piecewise additions
#11Measurement based uncomputation for quantum circuit optimization
#12Measurement based uncomputation for quantum circuit optimization
#13Real time configuration of multiple true random number generator sources for optimized entropy generation
#14Logarithmic addition-accumulator circuitry, processing pipeline including same, and methods of operation
#15In-memory arithmetic processors
#16Determining sums using logic circuits
#17Measurement based uncomputation for quantum circuit optimization
#18Surface code computations using auto-CCZ quantum states
#19Quantum circuit optimization using windowed quantum arithmetic
#20Oblivious carry runway registers for performing piecewise additions
#21Efficient FPGA multipliers
#22Selectable peripheral logic in programmable apparatus
#23Selectable peripheral logic in programmable apparatus
#24Selectable peripheral logic in programmable apparatus
#25Selectable peripheral logic in programmable apparatus
#26Techniques and devices for performing arithmetic
#27Lookup table sharing for memory-based computing
#28Lookup table sharing for memory-based computing
#29Lookup table sharing for memory-based computing
#30Lookup table sharing for memory-based computing
#31Operation unit and program
#32Look up table (LUT) structure supporting exclusive or (XOR) circuitry configured to allow for generation of a result using quaternary adders
#33Iterative carrier phase compensation in coherent fiber optic receivers
#34Method and System for Decoding Graph-Based Codes Using Message-Passing with Difference-Map Dynamics
#35Method and system for decoding graph-based codes using message-passing with difference-map dynamics
#36Secure multi-party computation of normalized sum-type functions
#37Memory based computation systems and methods for high performance and/or fast operations
#38N-bit constant adder/subtractor
#39Integer and characters prefix based methodologies combined with parallel data sort methodology enhance the execution performance of any string sorting algorithm
#40Selectable peripheral logic in programmable apparatus