ClassID:

189745

G06F9/328 - CPC Classification

Classification description:

Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs; Arrangements for executing machine instructions, e.g. instruction decode; Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching

Recent Application in this class:
#1
20230305868
2023-09-28

Changing program behavior at runtime

#2
20230168895
2023-06-01

Automated runtime configuration for dataflows

#3
20220276885
2022-09-01

Controller for a memory component

#4
20220050685
2022-02-17

Memory Systems and Memory Control Methods

#5
20210406653
2021-12-30

Extended memory neuromorphic component

#6
20210333327
2021-10-28

Controller for a memory component

#7
20210279062
2021-09-09

Automated runtime configuration for dataflows

#8
20210240467
2021-08-05

Method for implementing function jump, apparatus, and computer storage medium

#9
20210026620
2021-01-28

Memory devices, systems, and methods for updating firmware with single memory device

#10
20200249945
2020-08-06

Information processing apparatus, non-transitory computer-readable medium, and information processing method

#11
20200167161
2020-05-28

Synthetic depth image generation from cad data using generative adversarial neural networks for enhancement

#12
20200104119
2020-04-02

System, apparatus and method for dynamic update to code stored in a read-only memory (ROM)

#13
20200004662
2020-01-02

Cache-based trace replay breakpoints using reserved tag field bits

#14
20190146805
2019-05-16

Rebooting timing adjustment for improved performance

#15
20180107821
2018-04-19

Code instrumentation for runtime application self-protection

#16
20180107475
2018-04-19

Method for modifying the execution of a platform-independent method of an integrated circuit card

#17
20180074827
2018-03-15

Eliminating redundant stores using a protection designator and a clear designator

#18
20170178278
2017-06-22

METHOD AND APPARATUS FOR UPDATING A SHADER PROGRAM BASED ON CURRENT STATE

#19
20170168847
2017-06-15

Rebooting timing adjustment for improved performance

#20
20170161067
2017-06-08

Processor with an expandable instruction set architecture for dynamically configuring execution resources

#21
20170123803
2017-05-04

Modifying behavior of a data processing unit using rewritable behavior mappings of instructions

#22
20170109154
2017-04-20

System and method for analyzing user experience of a software application across disparate devices

#23
20150278110
2015-10-01

Transparent code patching

#24
20150277766
2015-10-01

Transparent code patching

#25
20150220344
2015-08-06

Memory systems and memory control methods

#26
20150186049
2015-07-02

System and method for low cost patching of high voltage operation memory space

#27
20150113250
2015-04-23

Microprocessor with compressed and uncompressed microcode memories

#28
20150089329
2015-03-26

Electronic circuit for fitting a virtual address range to a physical memory containing faulty address

#29
20150067666
2015-03-05

Propagation of microcode patches to multiple cores in multicore microprocessor

#30
20140281165
2014-09-18

Integrated circuit with a patching function

#31
20140156783
2014-06-05

System and method for analyzing user experience of a software application across disparate devices

#32
20140143521
2014-05-22

Instruction swap for patching problematic instructions in a microprocessor

#33
20140129810
2014-05-08

Known good code for on-chip device management

#34
20130227343
2013-08-29

Circuits and Methods for Replacing Defective Instructions

#35
20130191819
2013-07-25

Method for reconfiguring software parameters in a microcontroller as well as a microcontroller and control unit

#36
20130145128
2013-06-06

Programmable microcode unit for mapping plural instances of an instruction in plural concurrently executed instruction streams to plural microcode sequences in plural memory partitions

#37
20130080747
2013-03-28

Processor and instruction processing method in processor

#38
20130013849
2013-01-10

Programmable Patch Architecture for ROM

#39
20120226890
2012-09-06

ACCELERATOR AND DATA PROCESSING METHOD

#40
20120204015
2012-08-09

Sharing a data buffer

#41
20120151465
2012-06-14

Autonomic hardware assist for patching code

#42
20120047322
2012-02-23

Method and System of Using One-Time Programmable Memory as Multi-Time Programmable in Code Memory of Processors

#43
20110289299
2011-11-24

System and method to evaluate a data value as an instruction

#44
20110107070
2011-05-05

PATCHING OF A READ-ONLY MEMORY

#45
20110071816
2011-03-24

Just in time compiler in spatially aware emulation of a guest computer instruction set

#46
20100180104
2010-07-15

APPARATUS AND METHOD FOR PATCHING MICROCODE IN A MICROPROCESSOR USING PRIVATE RAM OF THE MICROPROCESSOR

#47
20100174890
2010-07-08

Known good code for on-chip device management

#48
20100169969
2010-07-01

Functional patching/hooking detection and prevention

#49
20100153619
2010-06-17

Methods for processing and addressing data between volatile memory and non-volatile memory in an electronic apparatus

#50
20100107149
2010-04-29

Patching devices and methods thereof for patching firmware functions

#51
20100064117
2010-03-11

Apparatus and method for updating set of limited access model specific registers in a microprocessor

#52
20090327650
2009-12-31

Device and method for bypassing a first program code portion with a replacement program code portion

#53
20090313611
2009-12-17

Dynamically patching computer code using breakpoints

#54
20090210659
2009-08-20

Processor and method for workaround trigger activated exceptions

#55
20090113175
2009-04-30

Processor architecture for concurrently fetching data and instructions

#56
20090031110
2009-01-29

MICROCODE PATCH EXPANSION MECHANISM

#57
20090031109
2009-01-29

APPARATUS AND METHOD FOR FAST MICROCODE PATCH FROM MEMORY

#58
20090031108
2009-01-29

CONFIGURABLE FUSE MECHANISM FOR IMPLEMENTING MICROCODE PATCHES

#59
20090031107
2009-01-29

ON-CHIP MEMORY PROVIDING FOR MICROCODE PATCH OVERLAY AND CONSTANT UPDATE FUNCTIONS

#60
20090031103
2009-01-29

MECHANISM FOR IMPLEMENTING A MICROCODE PATCH DURING FABRICATION

#61
20090013124
2009-01-08

ROM CODE PATCH METHOD

#62
20080250235
2008-10-09

Microcomputer and method of setting operation of microcomputer

#63
20080228993
2008-09-18

Wireless data communications using FIFO for synchronization memory

#64
20080216091
2008-09-04

Autonomic method and apparatus for hardware assist for patching code

#65
20080155232
2008-06-26

Sharing a data buffer

#66
20080155172
2008-06-26

MICROCODE PATCHING SYSTEM AND METHOD

#67
20080133838
2008-06-05

Data processing device

#68
20080112205
2008-05-15

Circuit and method for patching for program ROM

#69
20080013375
2008-01-17

MEMORY SYSTEM

#70
20070226463
2007-09-27

Patchable and/or programmable decode using predecode selection

#71
20070202827
2007-08-30

Wireless data communications using FIFO for synchronization memory

#72
20070198787
2007-08-23

Patching ROM code

#73
20070168650
2007-07-19

Replacing instruction and corresponding instructions in a queue according to rules when shared data buffer is accessed

#74
20070130416
2007-06-07

Microcomputer, programming method and erasing method

#75
20070106884
2007-05-10

Elastic shared RAM array including contiguous instruction and data portions distinct from each other

#76
20070088989
2007-04-19

Method for dynamically choosing between varying processor error resolutions

#77
20070088939
2007-04-19

Automatic and dynamic loading of instruction set architecture extensions

#78
20070083713
2007-04-12

System on a chip integrated circuit, processing system and methods for use therewith

#79
20070074003
2007-03-29

Method for reducing code size of a program in code memory by dynamically storing an instruction into a memory location following a group of instructions indicated by an offset operand and either a length operand or a bitmask operand of an echo instruction

#80
20070028087
2007-02-01

Method and system for reducing instruction storage space for a processor integrated in a network adapter chip

#81
20060212690
2006-09-21

System and method for processing complex computer instructions

#82
20060190765
2006-08-24

Method and system for correcting errors in read-only memory devices, and computer program product therefor

#83
20060174226
2006-08-03

Methods, Test Systems And Computer-Readable Medium For Dynamically Modifying Flow Of Executable Code

#84
20060107104
2006-05-18

Patching device for a processor

#85
20050240823
2005-10-27

Processor control system for supplying control instructions to a processor

#86
20050228959
2005-10-13

Method for patching ROM instructions in an electronic embedded system including at least a further memory portion

#87
20050159786
2005-07-21

Method and apparatus for hardware/firmware trap

#88
20050155030
2005-07-14

Autonomic method and apparatus for hardware assist for patching code

#89
20050122777
2005-06-09

Microcomputer, programming method and erasing method

#90
20050102550
2005-05-12

Method and structure for replacing faulty operating code contained in a ROM for a processor

#91
20050071605
2005-03-31

METHOD FOR ENABLING A BRANCH-CONTROL SYSTEM IN A MICROCOMPUTER APPARATUS

#92
20050060577
2005-03-17

Interrupt verification support mechanism

#93
20050010745
2005-01-13

Dynamic field patchable microarchitecture

#94
14969485
2016-11-29

Rebooting timing adjustment for improved performance