199665 ⎘
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
Sub-classes:ONE TIME PROGRAMMABLE MEMORY
#2One time programmable memory
#3Small-area side-capacitor read-only memory device, memory array and method for operating the same
#4Antifuse-type one time programming memory cell and cell array structure with same
#5One time programmable memory
#6One time programmable memory
#7Physically unclonable function circuit having lower gate-to-source/drain breakdown voltage
#8Storage device
#9OTP memory and method for making the same
#10Non-volatile memory devices and systems with read-only memory features and methods for operating the same
#11Memory device to suspend ROM operation and a method of operating the memory device
#12ROM cell with transistor body bias control circuit
#133D SRAM/ROM with several superimposed layers and reconfigurable by transistor rear biasing
#14Semiconductor device
#15Non-volatile memory devices and systems with read-only memory features and methods for operating the same
#16Apparatus for High Speed ROM Cells
#17Non-volatile memory devices and systems with read-only memory features and methods for operating the same
#18ROM chip manufacturing structures having shared gate electrodes
#19Apparatus for high speed ROM cells
#20Systems and methods for threshold voltage modification and detection
#21Memory circuit with leakage compensation
#22Methods for fabricating semiconductor shielding structures
#23ROM chip manufacturing structures having shared gate electrodes
#24Semiconductor device and method for operating the same
#25Memory circuit with leakage compensation
#26Single circuit one-time programmable memory and volatile memory
#27Clock generating device, electronic circuit, integrated circuit and electrical machinery
#28One-time and multi-time programming using a correlated electron switch
#29Read-only memory (ROM) architecture with selective encoding
#30Memory circuit with leakage compensation
#31Integrated circuit having an electrostatic discharge protection function and an electronic system including the same
#32Negative high voltage hot switching circuit
#33Sensing scheme for high speed memory circuits with single ended sensing
#34ROM chip manufacturing structures
#35Differential one-time-programmable (OTP) memory array
#36Flash memory device configurable to provide read only memory functionality
#37Memory devices including one-time programmable memory cells
#38Memory device including nonvolatile memory cell
#39Semiconductor device and control method thereof
#40Apparatus for high speed ROM cells
#41Memory array with RAM and embedded ROM
#42System and method of a novel redundancy scheme for OTP
#43Level shift driver circuit capable of reducing gate-induced drain leakage current
#44Highly scalable single-poly non-volatile memory cell
#45One time programming memory cell, array structure and operating method thereof
#46Non-volatile memory and associated memory array, row decoder, column decoder, write buffer and sensing circuit
#47OTP read sensor architecture with improved reliability
#48ROM chip manufacturing structures
#49System and method of programming a memory cell
#50High-speed address fault detection using split address ROM
#51Nonvolatile memory device and method of operating the same
#52One-time programmable memory and system-on chip including one-time programmable memory
#53Bitline circuits for embedded charge trap multi-time-programmable-read-only-memory
#54Wordline decoder circuits for embedded charge trap multi-time-programmable-read-only-memory
#55Semiconductor memory
#56SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE MOUNTING THE SEMICONDUCTOR MEMORY DEVICE
#57ROM chip manufacturing structures
#58One time programmable memory cell capable of reducing leakage current and preventing slow bit response
#59Read only memory array architecture and methods of operation
#60Read only memory bitline load-balancing
#61Apparatus for high speed ROM cells
#62Methods and apparatus for ROM devices
#63Semiconductor device having features to prevent reverse engineering
#64High-performance scalable read-only-memory cell
#65Semiconductor memory device having OTP cell array
#66OTP memories functioning as an MTP memory
#67Memory cell and memory
#68Complementary read-only memory (ROM) cell and method for manufacturing the same
#69MEMORY DEVICE INCLUDING PROGRAMMABLE ANTIFUSE MEMORY CELL ARRAY
#70Apparatus for high speed ROM cells
#71Circuit and system of a low density one-time programmable memory
#72Encoded read-only memory (ROM) bitcell, array, and architecture
#73Semiconductor device with OTP memory cell
#74MOSFET fuse and array element
#75Programmable memory device and memory access method
#76Complementary read-only memory (ROM) cell and method for manufacturing the same
#77Read-only memory (ROM) bitcell, array, and architecture
#78Encoded read-only memory (ROM) decoder
#79ROM implementation for ROM based logic design
#80Optimization of ROM structure by splitting
#81Method for read-only memory devices
#82Nonvolatile memory device storing data based on change in transistor characteristics
#83Optimization of ROM structure by splitting
#84Read-only memory device and related method of design
#85Nanocrystal write once read only memory for archival storage
#86Nanocrystal write once read only memory for archival storage
#87Nanocrystal write once read only memory for archival storage
#88Semiconductor device having voltage generator generating well potential
#89Systems and methods for threshold voltage modification and detection
#90Read only memory and data read method thereof
#91PPA (power performance area) efficient architecture for rom (read only memory) and a ROM bitcell without a transistor
#92Non-discharging read-only memory cells
#93PPA (power performance area) efficient architecture for ROM (read only memory) and a ROM bitcell without a transistor
#94High density memory architecture
#95Read only memory having multi-bit line bit cell
#96MLC OTP operation in A-Si RRAM