Signal processing circuit, distributed memory, ROM, and DAC which signal processing circuit is embedded

Memory device

One time programmable (OTP) bit cell with integrated inhibit device

METHOD FOR PROGRAMMING A ONE-TIME PROGRAMMABLE STRUCTURE, SEMICONDUCTOR COMPONENT AND RADIO FREQUENCY COMPONENT

Processor For Enhancing Network Security

Multi-Level Distributed Pattern Processor

Nonvolatile semiconductor storage device with cell transistors

Configurable computing array based on three-dimensional printed memory

Configurable computing array package based on printed memory

Configurable computing array die based on printed memory and two-sided integration

Storage with In-situ String-Searching Capabilities

Storage with In-situ Anti-Malware Capabilities

Processor for realizing at least two categories of functions

Multi-bit-per-cell three-dimensional one-time-programmable memory

Read-only memory (ROM) architecture with selective encoding

Method to program bitcells of a ROM array

Small-grain three-dimensional memory

Memory cell array

Large bit-per-cell three-dimensional mask-programmable read-only memory

Semiconductor memory with similar RAM and ROM cells

Small-grain three-dimensional memory

Three-dimensional writable printed memory

Programmable read-only memory device and method of writing the same

Semiconductor device with channel switching structure and method of making same

Non-salicide polysilicon fuse

Mask-Programmed Read-Only Memory with Reserved Space

Large bit-per-cell three-dimensional mask-programmable read-only memory

Read only memory cell for storing a multiple bit value

Memory circuit having memory cells with common source/drain region electrically isolated from all bit lines, system, and fabrication method thereof

Three-Dimensional Mask-Programmable Read-Only Memory with Reserved Space

LATCH TYPE FUSE CIRCUIT AND OPERATING METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

MASK ROM CELL STRUCTURE AND METHOD OF FABRICATING THE SAME

Semiconductor storage device and storage system

Memory cell for modification of revision identifier in an integrated circuit chip

Optically controlled read only memory

Semiconductor device and method for making same

Mask programmable anti-fuse architecture

Program lock circuit for a mask programmable anti-fuse memory array

CONVENTIONALLY PRINTABLE NON-VOLATILE PASSIVE MEMORY ELEMENT AND METHOD OF MAKING THEREOF

Leakage optimized memory

Semiconductor memory device

Semiconductor device and method of manufacturing the same and semiconductor manufacturing device

Semiconductor memory device

Dense read-only memory

Methods and systems for read-only memory

Semiconductor integrated circuit device including semiconductor integrated circuit board supplied with no high voltage

DUAL-ADDRESSED RECTIFIER STORAGE DEVICE

Memory comprising diode

Decoding techniques for read-only memory

Read only memory device with bitline leakage reduction

Layout techniques for memory circuitry

High-security mask ROM and data scramble/descramble method thereof

Programmable memory cell in an integrated circuit chip

Semiconductor memory device

Semiconductor memory device

Semiconductor memory device and corresponding programming method

Command user interface with programmable decoder

Reconfiguring a RAM to a ROM using layers of metallization

Semiconductor chip arrangement

Method for reading ROM cell

Method to produce data cell region and system region for semiconductor memory

Memory circuit and method for processing a code to be loaded into a memory circuit

Sense amplifier for mask read only memory

Circuit and/or method for implementing a patch mechanism for embedded program ROM

Fabrication method of semiconductor device

Non-discharging read-only memory cells