199671 ⎘
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using laser-fusible links
DELAY ELEMENTS FOR COMMAND TIMING IN A MEMORY DEVICE
#2Fuse block unit and fuse block system and memory device
#3Delay elements for command timing in a memory device
#4State detection circuit for anti-fuse memory cell, and memory
#5Memory cell, memory device, and related identification tag
#6Method and apparatus for enabling multiple return material authorizations (RMAs) on an integrated circuit device
#7METHOD FOR PROGRAMMING A ONE-TIME PROGRAMMABLE STRUCTURE, SEMICONDUCTOR COMPONENT AND RADIO FREQUENCY COMPONENT
#8Processor For Enhancing Network Security
#9Multi-Level Distributed Pattern Processor
#10Fuse array and memory device
#11Image Storage with In-Situ Image-Searching Capabilities
#12Antifuse element using spacer breakdown
#13Configurable computing array based on three-dimensional printed memory
#14Method and system for implementing one-wire programmable circuit
#15METHOD AND APPARATUS FOR MULTI-DIMENTIONAL CODE STORAGE AND TRANSFER SYSTEM
#16Semiconductor apparatus and repair method thereof
#17Secure Printed Memory
#18Semiconductor apparatus and repair method thereof
#19Semiconductor device
#20Antifuse element using spacer breakdown
#21Semiconductor device including redundancy cell array
#22Semiconductor device, semiconductor memory device and memory system
#23Semiconductor elements stacked and bonded with an anisotropic conductive adhesive
#24Three-dimensional writable printed memory
#25SEMICONDUCTOR DEVICE HAVING FUSE ELEMENTS AND GUARD RING SURROUNDING THE FUSE ELEMENTS
#26Semiconductor device
#27Semiconductor storage device with wiring that conserves space
#28Implementing vertical die stacking to distribute logical function over multiple dies in through-silicon-via stacked semiconductor device
#29SEMICONDUCTOR MEMORY DEVICE
#30Fuse set and semiconductor integrated circuit apparatus having the same
#31Semiconductor memory device and driving method of the same
#32Memory device made from stacked substrates bonded with a resin containing conductive particles
#33Semiconductor device having nonvolatile memory element and data processing system including the same
#34Fuse circuit and redundancy circuit
#35Memory circuit including row and column selection for writing information
#36SEMICONDUCTOR STRUCTURE PROCESSING USING MULTIPLE LATERALLY SPACED LASER BEAM SPOTS WITH JOINT VELOCITY PROFILING
#37Fuse box and semiconductor memory device including the same
#38Semiconductor device including fuse and method for testing the same capable of suppressing erroneous determination
#39Systems and methods for adapting parameters to increase throughput during laser-based wafer processing
#40Semiconductor device
#41SEMICONDUCTOR DEVICE WITH A PLURALITY OF DIFFERENT ONE TIME PROGRAMMABLE ELEMENTS
#42Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements
#43Systems and methods for semiconductor structure processing using multiple laser beam spots
#44Semiconductor integrated circuit and test method thereof
#45Transmission/reception semiconductor device with memory element and antenna on same side of conductive adhesive
#46Semiconductor device, unique ID of semiconductor device and method for verifying unique ID
#47Semiconductor device
#48Fuse box, method of forming a fuse box, and fuse cutting method
#49Semiconductor device
#50Semiconductor device including fuse and method for testing the same capable of suppressing erroneous determination
#51Systems and methods for alignment of laser beam(s) for semiconductor link processing
#52Systems and methods for distinguishing reflections of multiple laser beams for calibration for semiconductor structure processing
#53Semiconductor device with a plurality of fuse elements and method for programming the device
#54Method and system for testing RAM redundant integrated circuits
#55System and method for configuring an integrated circuit
#56Controlling clock rates of an integrated circuit including generating a clock rate control parameter from integrated circuit configuration
#57Integrated circuit device and testing method thereof
#58Semiconductor structure processing using multiple laterally spaced laser beam spots with joint velocity profiling
#59Semiconductor link processing using multiple laterally spaced laser beam spots with on-axis offset
#60Programmable circuits for performing machine learning operations on edge devices