199670 ⎘
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
Sub-classes:Testmode Revision Control Circuitry
#2Sensing module, memory device, and sensing method applied to identify un-programmed/programmed state of non-volatile memory cell
#3Single-layer polysilicon nonvolatile memory cell and memory including the same
#43D SEMICONDUCTOR DEVICE AND STRUCTURE
#53D SEMICONDUCTOR DEVICE AND STRUCTURE
#6Processor For Enhancing Network Security
#7Apparatuses and/or methods for operating a memory cell as an anti-fuse
#8Bi-sided pattern processor
#9Multi-Level Distributed Pattern Processor
#10METHODS TO PRODUCE A 3D SEMICONDUCTOR MEMORY DEVICE AND SYSTEM
#11Secure device state apparatus and method and lifecycle management
#12METHOD FOR PRODUCING A 3D MEMORY DEVICE
#133D SEMICONDUCTOR DEVICE AND SYSTEM
#143D SEMICONDUCTOR DEVICE AND SYSTEM
#153D SEMICONDUCTOR DEVICE AND SYSTEM
#16Antifuses integrated on semiconductor-on-insulator (SOI) substrates
#173D SEMICONDUCTOR DEVICE AND SYSTEM
#183D SEMICONDUCTOR DEVICE AND SYSTEM
#19Memory controller and memory system for suppression of fluctuation of voltage drop
#20A 3D SEMICONDUCTOR DEVICE AND SYSTEM
#213D SEMICONDUCTOR DEVICE AND SYSTEM
#223D SEMICONDUCTOR DEVICE AND SYSTEM
#233D SEMICONDUCTOR DEVICE AND SYSTEM
#243D SEMICONDUCTOR DEVICE AND SYSTEM
#253D SEMICONDUCTOR DEVICE AND SYSTEM
#263D semiconductor device and system
#27Array of programmable memory elements with an array of second circuit elements
#283D semiconductor device, fabrication method and system
#29Configurable computing array based on three-dimensional printed memory
#30Secure device state apparatus and method and lifecycle management
#31Multi-time programmable device
#32Apparatuses and/or methods for operating a memory cell as an anti-fuse
#33Three-transistor OTP memory cell
#34Read-only memory (ROM) architecture with selective encoding
#35Energetic potting materials, electronic devices potted with the energetic potting materials, and related methods
#36Semiconductor apparatus and repair method thereof
#37Nonvolatile memory devices and solid state drives including the same
#38Apparatuses and/or methods for operating a memory cell as an anti-fuse
#39Semiconductor apparatus and repair method thereof
#40Memory circuit and layout structure of a memory circuit
#41Apparatuses and/or methods for operating a memory cell as an anti-fuse
#42EPROM cell array, method of operating the same, and memory device including the same
#43EPROM cell array, method of operating the same, and memory device including the same
#44One-time programmable memory
#45Semiconductor device having fuse array with disconnectable voltage generator and method of operating the same
#46Resistance-based memory cells with multiple source lines
#47Method for producing an electronic device with a disabled sensitive mode, and method for transforming such an electronic device to re-activate its sensitive mode
#483D semiconductor device and structure
#49SEMICONDUCTOR MEMORY DEVICE HAVING FUSE CELL ARRAY
#50Three-dimensional nonvolatile memory and method of fabrication
#51Methods and apparatus for ROM devices
#52Semiconductor device and method for forming the same
#53Low cost programmable multi-state device
#54Apparatuses and/or methods for operating a memory cell as an anti-fuse
#55Pillar-shaped nonvolatile memory and method of fabrication
#56Electronic device including a nonvolatile memory structure having an antifuse component
#57Circuit and system for using junction diode as program selector for one-time programmable devices
#58METHOD AND APPARATUS FOR TESTING ONE TIME PROGRAMMABLE (OTP) ARRAYS
#59ANTI-FUSE CIRCUIT
#60Semiconductor device and method for forming the same
#61Flash-to-ROM conversion
#62Process for forming an electronic device including a nonvolatile memory structure having an antifuse component
#63Three-dimensional writable printed memory
#64Field programmable read-only memory device
#65Semiconductor device and structure
#66Control circuitry for memory cells
#67SEMICONDUCTOR DEVICE HAVING FUSE ELEMENTS AND GUARD RING SURROUNDING THE FUSE ELEMENTS
#68Vertically stacked field programmable nonvolatile memory and method of fabrication
#69Circuit and system of using junction diode as program selector for one-time programmable devices
#70Programmable memory device and memory access method
#71ROM GENERATOR
#72Semiconductor device having plural optical fuses and manufacturing method thereof
#73Non-volatile one-time-programmable and multiple-time programmable memory configuration circuit
#74Repair circuit and control method thereof
#75Semiconductor device including fuse array and method of operation the same
#76Method for fabrication of a semiconductor device and structure
#77Built-in self test for one-time-programmable memory
#78Test cells for an unprogrammed OTP memory array
#79Redundancy control circuit and memory device including the same
#80Method for fabrication of a semiconductor device and structure
#81Apparatus and method for testing one-time-programmable memory
#82Multi-time programmable memory
#83Voltage sensitive resistor (VSR) read only memory
#84Method for operating a register stage of a dual function data register
#85Read only memory and operating method thereof
#86Printed compatible designs and layout schemes for printed electronics
#87Semiconductor testing apparatus and method
#88Charge pump with low power, high voltage protection circuitry
#89Semiconductor storage device and ROM generator
#90Vertically stacked field programmable nonvolatile memory and method of fabrication
#91Testing one time programming devices
#92METHOD FOR INCREASING THE MANUFACTURING YIELD OF PROGRAMMABLE LOGIC DEVICES
#93Semiconductor device having nonvolatile memory element and data processing system including the same
#94Method for fabrication of a semiconductor device and structure
#95Fuse circuit and semiconductor device having the same
#96Fault diagnosis for non-volatile memories
#97SEMICONDUCTOR DEVICE
#98One-time programmable fuse with ultra low programming current
#99Write-once nonvolatile memory with redundancy capability
#100Integrated circuit incorporating decoders disposed beneath memory arrays
#101One time programmable memory device and manufacturing method of one time programmable memory device
#102Non-volatile one-time—programmable and multiple-time programmable memory configuration circuit
#103SEMICONDUCTOR STRUCTURE PROCESSING USING MULTIPLE LATERALLY SPACED LASER BEAM SPOTS WITH JOINT VELOCITY PROFILING
#104Method of making a diode read/write memory cell in a programmed state
#105Memory Bitcell and Method of Using the Same
#106Fuse of semiconductor memory device
#107Method of memory build-in self-test
#108Program verify method for OTP memories
#109Power up detection system for a memory device
#110Dual function data register
#111Test circuit for an unprogrammed OTP memory array
#112Circuit arrangement comprising a non-volatile memory cell and method
#113Stacked memory and fuse chip
#114Microprocessor memory management
#115CIRCUIT FOR DYNAMIC READOUT OF FUSED DATA IN IMAGE SENSORS
#116Storage data unit using hot carrier stressing
#117Probe-based memory
#118Method for programming an electronic circuit and electronic circuit
#119Fuse latch circuit and fuse latch method
#120Multi-layer electrode, cross point memory array and method of manufacturing the same
#121SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
#122Semiconductor Testing Apparatus and Method
#123Programmable ROM using two bonded strata
#124METHOD AND APPARATUS FOR PRINTED RESISTIVE READ ONLY MEMORY
#125Method and apparatus for storing data in a write-once non-volatile memory
#126Method and apparatus for improving data transfer
#127Three-dimensional memory cells
#128Fuse farm redundancy method and system
#129Memory device with error correction based on automatic logic inversion
#130SELF-TIMED SYNCHRONOUS MEMORY
#131Process and system for the verification of correct functioning of an on-chip memory
#132Electrical fuses with redundancy
#133One time programming cell structure and method of fabricating the same
#134Semiconductor device
#135SEMICONDUCTOR DEVICE WITH A PLURALITY OF DIFFERENT ONE TIME PROGRAMMABLE ELEMENTS
#136Semiconductor device including a plurality of fuse elements and attenuation members between or around the plurality of fuse elements
#137Test cells for semiconductor yield improvement
#138Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements
#139Fuse cell array with redundancy features
#140Redundancy circuit and semiconductor memory device
#141Systems and methods for semiconductor structure processing using multiple laser beam spots
#142Vertically stacked field programmable nonvolatile memory and method of fabrication
#143SEMICONDUCTOR MEMORY DEVICE
#144Storage device and data output circuit
#145Semiconductor integrated circuit device including semiconductor integrated circuit board supplied with no high voltage
#146ID installable LSI, secret key installation method, LSI test method, and LSI development method
#147Programming methods to increase window for reverse write 3D cell
#148Method and apparatus for hot carrier programmed one time programmable (OTP) memory
#149Memory array with readout isolation
#150Nano-vacuum-tubes and their application in storage devices
#151Memory array with readout isolation
#152Memory array with readout isolation
#153Probe-based memory
#154One-time-programmable (OTP) memory device and method for testing the same
#155Semiconductor device
#156Option circuits and option methods of semiconductor chips
#157Three-dimensional memory cells
#158ROM redundancy in ROM embedded DRAM
#159MEMORY CELL COMPRISING A DIODE FABRICATED IN A LOW RESISTIVITY, PROGRAMMED STATE
#160Method of making a diode read/write memory cell in a programmed state
#161Method for increasing the manufacturing yield of programmable logic devices
#162Write-once nonvolatile memory with redundancy capability
#163Mechanism for read-only memory built-in self-test
#164Multiple data state memory cell
#165Fuse box, method of forming a fuse box, and fuse cutting method
#166Programmable memory and access method for the same
#167Memory cell comprising switchable semiconductor memory element with trimmable resistance
#168Three-Dimensional Mask-Programmable Read-Only Memory
#169Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance
#170Method for using a multi-use memory cell and memory array
#171Multi-use memory cell and memory array
#172ROM-based memory testing
#173Systems and methods for alignment of laser beam(s) for semiconductor link processing
#174Systems and methods for distinguishing reflections of multiple laser beams for calibration for semiconductor structure processing
#175Method and apparatus for programming a memory array
#176Data management method and data management system
#177Method and apparatus for storing data in a write-once non-volatile memory
#178Controlling multiple signal polarity in a semiconductor device
#179Read-only memory and operational control method thereof
#180Electrical fuses with redundancy
#181Method for eliminating crosstalk in a metal programmable read only memory
#182Vertically stacked field programmable nonvolatile memory and method of fabrication
#183Vertically stacked field programmable nonvolatile memory and method of fabrication
#184Semiconductor memory and method of testing semiconductor memory
#185Three-state memory cell
#186Semiconductor integrated circuit
#187Built-in self test for read-only memory including a diagnostic mode
#188One-time programmable (OTP) memory devices enabling programming based on protected status and methods of operating same
#189Low voltage programmable eFuse with differential sensing scheme
#190Programmable semi-fusible link read only memory and method of margin testing same
#191Fuse box, semiconductor memory device having the same and setting method thereof
#192Semiconductor memory with a data holding circuit having two output terminals
#193Semiconductor structure processing using multiple laterally spaced laser beam spots with joint velocity profiling
#194Semiconductor link processing using multiple laterally spaced laser beam spots with on-axis offset
#195Programmable MOS device formed by stressing polycrystalline silicon
#196One-time programmable memory cell
#197Multiple data state memory cell
#198Memory circuit and method for processing a code to be loaded into a memory circuit
#199Nonvolatile memory programmable by a heat induced chemical reaction
#200Method of making a nonvolatile memory programmable by a heat induced chemical reaction
#201Memory cell with non-destructive one-time programming
#202Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement
#203Nonvolatile semiconductor memory device including high efficiency and low cost redundant structure
#204Memory device and method for simultaneously programming and/or reading memory cells on different levels
#205Method for programming programmable eraseless memory
#206Pure CMOS latch-type fuse circuit
#207Systems and methods for a compressed bitcell read-only memory
#208One-time programmable memory device
#209Method of blowing an antifuse element