199672 ⎘
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM Write once memory, i.e. allowing changing of memory content by writing additional bits
READ-ONLY MEMORY WITH ONE-TRANSISTOR READ-ONLY MEMORY CELLS AND METHOD FOR WRITING READ-ONLY MEMORY CODE WITH BIT LINE LOAD OPTIMIZATION INTO READ-ONLY MEMORY
#2SEMICONDUCTOR STORAGE DEVICE, PRINTING HEAD, AND DATA WRITING METHOD
#3OTP MEMORY DEVICE AND OTP MEMORY CELL HAVING MULTIPLE PROGRAM TRANSISTORS
#4CONTROLLING TRAP FORMATION TO IMPROVE MEMORY WINDOW IN ONE-TIME PROGRARM DEVICES
#5One-time programmable (OTP) memory device and method of operating an OTP memory device
#6CONTROLLING TRAP FORMATION TO IMPROVE MEMORY WINDOW IN ONE-TIME PROGRARM DEVICES
#7Controlling trap formation to improve memory window in one-time program devices
#8IMEI storage
#9Systems and methods to test a memory device
#10Storage device providing high security and electronic device including the storage device
#11Flexible and efficient device trim support using eFuse
#12Semiconductor apparatus and semiconductor system including the semiconductor apparatus
#13Semiconductor storage device
#14System implementation of one-time programmable memories
#15Flexible and efficient device trim support using efuse
#16Systems and methods to test a memory device
#17Trusted monotonic counter using internal and external non-volatile memory
#18SYSTEM, APPARATUS, AND METHOD OF PROGRAMMING A ONE-TIME PROGRAMMABLE MEMORY CIRCUIT
#19IMEI storage
#20Systems and methods to test a memory device
#21Memory system
#22Gate oxide breakdown in OTP memory cells for physical unclonable function (PUF) security
#23Semiconductor apparatus, liquid discharge head substrate, liquid discharge head, and liquid discharge apparatus
#24Systems and methods to provide security to one time program data
#25Error correction using WOM codes
#26WOM code emulation of EEPROM-type devices
#27System, apparatus, and method of programming a one-time programmable memory circuit having dual programming regions
#28Method and system of programmable resistive devices with read capability using a low supply voltage
#29Level shift driver circuit capable of reducing gate-induced drain leakage current
#30Highly scalable single-poly non-volatile memory cell
#31One time programming memory cell, array structure and operating method thereof
#32Low-pin-count non-volatile memory interface with soft programming capability
#33Joint rewriting and error correction in write-once memories
#34Semiconductor nonvolatile memory device with one-time programmable memories
#35Mechanisms for built-in self test and repair for memory devices
#36Memory programming method and apparatus
#37Circuit and system of using junction diode of MOS as program selector for programmable resistive devices
#38One-time programmable devices having program selector for electrical fuses with extended area
#39Circuit and system for concurrently programming multiple bits of OTP memory devices
#40Two-bit read-only memory cell
#41Error detection and correction of one-time programmable elements
#42OTP scheme with multiple magnetic tunnel junction devices in a cell
#43Mechanisms for built-in self test and repair for memory devices
#44Multiple write operations without intervening erase
#45Implementing enhanced data write for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding
#46Control circuitry for memory cells
#47Nonvolatile semiconductor memory device and method of reusing same
#48Current detection method
#49NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
#50Semiconductor testing apparatus and method
#51Systems and methods for controlling integrated circuit operation with below ground pin voltage
#52SEMICONDUCTOR DEVICE
#53Converting SRAM cells to ROM cells
#54Memory device and program method thereof
#55Memory Bitcell and Method of Using the Same
#56Quad SRAM based one time programmable memory
#57Memory power controller
#58Memory device capable of one-time data writing and repeated data reproduction, and method and display apparatus for operating the memory device
#59Quad SRAM based one time programmable memory
#60Semiconductor Testing Apparatus and Method
#61MULTIPLE ANTIFUSE MEMORY CELLS AND METHODS TO FORM, PROGRAM, AND SENSE THE SAME
#62Memory element and semiconductor device
#63Nanocrystal write once read only memory for archival storage
#64Nanocrystal write once read only memory for archival storage
#65Dual gate oxide one time programmable (OTP) antifuse cell
#66MTP storage medium and access algorithm method with traditional OTP
#67Method for accessing memory
#68One time programmable memory
#69One time programmable latch and method
#70Semiconductor device and methods of manufacturing the same
#71OTP antifuse cell and cell array
#72One-time programmable (OTP) memory devices enabling programming based on protected status and methods of operating same
#73Nanocrystal write once read only memory for archival storage
#74One-time programmable memory device
#75Memory with select line voltage control
#76Protection against differential power analysis attacks involving initialization vectors
#77MLC OTP operation in A-Si RRAM