199791 ⎘
Checking stores for correct operation ; Subsequent repair ; Testing stores during standby or offline operation; Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals; Marginal testing, e.g. race, voltage or current testing Characteristic
Inspection method for semiconductor memory
#302Method and circuit for reducing degradation in a regulated circuit
#303Methods for wafer level burn-in
#304Energy adjusted write pulses in phase-change memories
#305Method for operating a non-volatile charge-trapping memory device and method for determining programming/erase conditions
#306Read source line compensation in a non-volatile memory
#307Systems and methods for maintaining performance at a reduced power
#308Method for analyzing defect of SRAM cell
#309Memory system and semiconductor integrated circuit
#310Method and system for performing system-level correction of memory errors
#311Temperature determination and communication for multiple devices of a memory module
#312Volatile device keys and applications thereof
#313Securely field configurable device
#314High bandwidth datapath load and test of multi-level memory cells
#315Memory circuit having a crosstalk-glitch suppressor circuit and a control device for controlling an amount of suppression performed by the crosstalk-glitch suppressor circuit
#316Integrated circuit device having a test circuit to measure AC characteristics of internal memory macro
#317Integrated circuit including silicon wafer with annealed glass paste
#318Energy adjusted write pulses in phase-change memories
#319Method for modeling inductive effects on circuit performance
#320Method for capacitance measurement in silicon
#321Accelerated low power fatigue testing of FRAM
#322Sequential tracking temperature sensors and methods
#323Static random access memory and pseudo-static noise margin measuring method
#324Transfer base substrate and method of semiconductor device
#325Memory devices configured to detect failure of temperature sensors thereof and methods of operating and testing same
#326Direct memory access interface in integrated circuits
#327Calibration of thermal sensors for semiconductor dies
#328Method for testing an integrated semiconductor memory
#329Method and apparatus for evaluating semiconductor device
#330Method and device to detect the likely onset of thermal relaxation in magnetic data storage devices
#331Operating temperature optimization in a ferroelectric or electret memory
#332Circuit and method for adjusting threshold drift over temperature in a CMOS receiver
#333Ferroelectric memory device
#334Temperature detector providing multiple detected temperature points using single branch and method of detecting shifted temperature
#335Semiconductor device with self refresh test mode
#336Semiconductor device with self refresh test mode
#337Process monitoring by comparing delays proportional to test voltages and reference voltages
#338Methods for writing and reading highly resolved domains for high density data storage
#339High density data storage device having eraseable bit cells
#340Circuit and method for detecting skew of transistor in semiconductor device
#341Apparatus and methods for ferroelectric ram fatigue testing
#342Integrated circuit
#343Apparatus for determining burn-in reliability from wafer level burn-in
#344Semiconductor component with internal heating
#345Device and method for detecting alignment of active areas and memory cell structures in DRAM devices
#346Methods for wafer level burn-in
#347Current threshold detector
#348Semiconductor memory device changing refresh interval depending on temperature
#349Circuits for transistor testing
#350Semiconductor integrated circuit device and bit line capacitance adjusting method using the device
#351Magnetic memory which compares compressed fault maps
#352Memory system and semiconductor integrated circuit
#353Method for on-die detection of the system operation frequency in a DRAM to adjust DRAM operations
#354Calibration of memory circuits
#355Identifying process and temperature of silicon chips
#356Method for analyzing defect of SRAM cell
#357Method for testing flash memory power loss recovery
#358Information recording method using superconduction having bands, calculating method, information transmitting method, energy storing method, magnetic flux measuring method, and quantum bit construction method
#359List mode multichannel analyzer
#360Signal test procedure for testing semi-conductor components and a test apparatus for testing semi-conductor components
#361Semiconductor device and method of inspecting the same
#362Magnetic memory having a calibration system
#363Accelerated life test of MRAM cells
#364[INTEGRATED CIRCUIT AND METHOD FOR SIMULATING AND TRIMMING THEREOF]
#365Signal margin test mode for FeRAM with ferroelectric reference capacitor
#366Reference circuit implemented to reduce the degradation of reference capacitors providing reference voltages for 1T1C FeRAM devices
#367FeRAM using programmable register
#368Test structure for a single-sided buried strap DRAM memory cell array
#369Circuits and methods for characterizing random variations in device characteristics in semiconductor integrated circuits
#370Circuit and method for configuring CAM array margin test and operation
#371Method for analyzing fail bit maps of wafers
#372Temperature detection circuit and temperature detection method
#373Apparatus for determining burn-in reliability from wafer level burn-in
#374Semiconductor integrated circuit device and method of testing the same
#375Embedded transconductance test circuit and method for flash memory cells