199878 ⎘
Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor; Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells; Refreshing of dynamic cells Calibration or ate or cycle tuning
Memory logic for controlling refresh operations
#302Semiconductor memory device and refresh method thereof
#303Self refresh circuit of PSRAM for real access time measurement and operating method for the same
#304Device for controlling temperature compensated self-refresh period
#305Method and system for dynamically adjusting DRAM refresh rate
#306Method and apparatus for controlling refresh operations in a dynamic memory device
#307Memory
#308Method and apparatus to control a power consumption of a memory device
#309Semiconductor memory and method for operating the same
#310Semiconductor memory apparatus and method for operating a semiconductor memory apparatus
#311Voltage controlled oscillator
#312Non-skipping auto-refresh in a DRAM
#313Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages
#314Semiconductor memory device, test circuit and test method
#315Semiconductor memory device, refresh control method thereof, and test method thereof
#316Semiconductor memory
#317Self refresh period control circuits
#318DRAM with hidden refresh
#319Method and system for controlling refresh to avoid memory cell data losses
#320Memory having variable refresh control and method therefor
#321System and method for refreshing random access memory cells
#322Fuse box, semiconductor memory device having the same and setting method thereof
#323Assessing energy requirements for a refreshed device
#324Circuits and methods of temperature compensation for refresh oscillator
#325Semiconductor memory device and refresh period controlling method
#326Circuits and methods of temperature compensation for refresh oscillator
#327DRAM device with a refresh period that varies responsive to a temperature signal having a hysteresis characteristic
#328Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
#329Refresh counter with dynamic tracking of process, voltage and temperature variation for semiconductor memory
#330Apparatus for controlling self-refresh period in memory device
#331Semiconductor memory device
#332Memory with adjustable access time
#333Refresh methods for RAM cells featuring high speed access
#334Refresh operation type semiconductor memory device capable of smoothly transferring special state to normal active state and its driving method
#335Semiconductor memory device having a delay circuit
#336Self-refresh control circuit
#337Semiconductor storage device and method of controlling refreshing of semiconductor storage device
#338Oscillator circuit having a temperature dependence
#339Semiconductor memory device suitable for mounting on portable terminal
#340Semiconductor memory device and method of refreshing the semiconductor memory device
#341Semiconductor storage device and refresh control method therefor
#342Semiconductor memory device changing refresh interval depending on temperature
#343Semiconductor memory
#344Semiconductor integrated circuit device and digital measuring instrument
#345Semiconductor memory device with optimum refresh cycle according to temperature variation
#346Method and circuit for reducing DRAM refresh power by reducing access transistor sub threshold leakage
#347Method and apparatus for controlling refresh cycles of a plural cycle refresh scheme in a dynamic memory
#348Compensated refresh oscillator
#349Refresh for dynamic cells with weak retention
#350Semiconductor device
#351Semiconductor memory device having row path control circuit and operating method thereof
#352Auto-refresh multiple row activation
#353Word line enable timing determination circuit of a memory device and methods of determining word line enable timing in the memory device
#354Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
#355Circuits and methods of temperature compensation for refresh oscillator
#356Semiconductor memory device
#357Memory buffer device integrating refresh logic
#358Method and apparatus for controlling refresh operations in a dynamic memory device
#359Self-refresh system and method for dynamic random access memory
#360Semiconductor memory
#361Temperature detecting circuit for controlling a self-refresh period of a semiconductor memory device
#362Circuit and method for evaluating and controlling a refresh rate of memory cells of a dynamic memory
#363Memory device having a configurable oscillator for refresh operation
#364Method and system of adjusting DRAM refresh interval
#365Circuit and method for refreshing memory cells of a dynamic memory
#366Memory controller for controlling a refresh cycle of a memory and a method thereof
#367Semiconductor memory device capable of outputting data when a read request not accompanied with an address change being issued
#368Semiconductor memory device and electronic device for activation control of word lines in a semiconductor memory device