199891 ⎘
Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor; Indexing scheme relating to and sub-groups for features not covered by these groups; Multilevel memory cell aspects Multilevel magnetic memory cell using non-magnetic non-conducting interlayer, e.g. MTJ
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#2SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#3METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
#4Semiconductor device and method for fabricating the same
#5MRAM DEVICE WITH ANNULAR ELECTRODES
#6SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#7SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
#8Magnetic tunnel junction device and method of forming same
#9SEMICONDUCTOR DEVICE, METHOD OF FABRICATING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR STRUCTURE HAVING SEMICONDUCTOR DEVICE
#10Semiconductor structure integrated with magnetic tunneling junction
#11Semiconductor device and method for fabricating the same
#12Back-side memory element with local memory select transistor
#13Magnetic tunnel junction device and method of forming same
#14Semiconductor structure integrated with magnetic tunneling junction
#15Semiconductor device and method for fabricating the same
#16Semiconductor device and method for fabricating the same
#17Structured pedestal for MTJ containing devices
#18Integrated circuit device
#19Reinforced single element bottom electrode for MTJ-containing devices
#20Semiconductor device and method for fabricating the same
#21Multi-state memory and method for manufacturing the same
#22Tunable tetragonal ferrimagnetic heusler compound with PMA and high TMR
#23Magnetic tunnel junction device and method of forming same
#24Semiconductor device having magnetic tunnel junction (MTJ) stack
#25Semiconductor structure integrated with magnetic tunneling junction
#26Magnetoresistance device and method for forming the same
#27Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory
#28Read-out techniques for multi-bit cells
#29Three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer
#30Bit line structures for three-dimensional arrays with magnetic tunnel junction devices including an annular free magnetic layer and a planar reference magnetic layer
#31Three-dimensional arrays with magnetic tunnel junction devices including an annular discontinued free magnetic layer and a planar reference magnetic layer
#32Back-side memory element with local memory select transistor
#33Magnetoresistive stacks and methods therefor
#34Methods of fabricating magnetic tunnel junctions integrated with selectors
#35METHOD OF MANUFACTURING A MAGNETIC MEMORY DEVICE HAVING BUFFER LAYER
#36Storage device, information processing apparatus, and storage device control method
#37Back-side memory element with local memory select transistor
#38Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory
#39Memory cells with enhanced tunneling magnetoresistance ratio, memory devices and systems including the same
#40Magnetoresistive device and method of fabricating same
#41Methods of fabricating magnetic memory devices
#42Spin torque MRAM fabrication using negative tone lithography and ion beam etching
#43Magnetic memory device having buffer layer
#44Method of manufacturing a magnetoresistive stack/ structure using plurality of encapsulation layers
#45Spin torque MRAM fabrication using negative tone lithography and ion beam etching
#46Semiconductor devices and semiconductor packages including magnetic shielding layers and methods of manufacturing semiconductor devices and semiconductor packages
#47MRAM element with low writing temperature
#48Electronic device having a variable resistance element with a protection layer and method for fabricating the same
#49Semiconductor storage device
#50Method of forming a magnetic tunnel junction device
#51High capacity low cost multi-state magnetic memory
#52Multi-state spin-torque transfer magnetic random access memory
#53High speed magnetic random access memory-based ternary CAM
#54Multi-free layer MTJ and multi-terminal read circuit with concurrent and differential sensing
#55Method of forming a magnetic tunnel junction device
#56Semiconductor storage device
#57High-capacity low cost multi-state magnetic memory
#58High capacity low cost multi-state magnetic memory
#59Domain wall motion element and magnetic random access memory
#60Method of forming a magnetic tunnel junction device
#61Method and system for providing magnetic elements having enhanced magnetic anisotropy and memories using such magnetic elements
#62Method of forming a magnetic tunnel junction device
#63MULTI-STATE SPIN-TORQUE TRANSFER MAGNETIC RANDOM ACCESS MEMORY
#64High capacity low cost multi-state magnetic memory
#65Multi-sensing level MRAM structure with different magneto-resistance ratios
#66Magneto-resistive RAM having multi-bit cell array structure
#67Multi-sensing level MRAM structures
#68Multiple-bit magnetic random access memory cell employing adiabatic switching
#69Multi-bit MRAM device with switching nucleation sites
#70Multi-bit magnetic memory cells
#71Multi-sensing level MRAM structure with different magnetoresistance ratios
#72Method for manufacturing high density magnetic tunnel junction devices using photolithographic VIAS and chemically guided block copolymer self assembly
#73Domain wall control in ferroelectric devices