199898 ⎘
Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor; Indexing scheme relating to and sub-groups for features not covered by these groups; Multilevel memory programming aspects Concurrent multilevel programming and programming verification
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRAMMING DISTRIBUTION AND A PROGRAMMING DISTRIBUTION ADJACENT TO AN INITIAL PROGRAMMING DISTRIBUTION
#2ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRAMMING DISTRIBUTION AND A PROGRAMMING DISTRIBUTION ADJACENT TO AN INITIAL PROGRAMMING DISTRIBUTION
#3Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution
#4Concurrent programming of multiple cells for non-volatile memory devices
#5Concurrent programming of multiple cells for non-volatile memory devices
#6Dragging first pass read level thresholds based on changes in second pass read level thresholds
#7Dynamic programming of valley margins
#8Dynamic programing of valley margins of a memory cell
#9Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution
#10Dragging first pass read level thresholds based on changes in second pass read level thresholds
#11Concurrent programming of multiple cells for non-volatile memory devices
#12Misplacement mitigation algorithm
#13Semiconductor memory device
#14Method for writing into and reading a multi-levels EEPROM and corresponding memory device
#15Programming of nonvolatile memory with verify level dependent on memory state and programming loop count
#16Memory system including semiconductor memory device and program method thereof
#17Auto low current programming method without verify
#18Method for writing into and reading a multi-levels EEPROM and corresponding memory device
#19Reading soft bits simultaneously
#20Method and system for reducing write-buffer capacities within memristor-based data-storage devices
#21Semiconductor storage apparatus or semiconductor memory module
#22Multi level antifuse memory device and method of operating the same
#23Simultaneous multi-level binary search in non-volatile storage
#24Method and circuit for switching a memristive device
#25Simultaneous multi-state read or verify in non-volatile storage
#26Semiconductor storage apparatus or semiconductor memory module
#27Memory array with write feedback
#28Simultaneous multi-state read or verify in non-volatile storage
#29Non-volatile memory with fast binary programming and reduced power consumption
#30Method for protecting memory cells during programming
#31Efficient verification for coarse/fine programming of non-volatile memory
#32Efficient verification for coarse/fine programming of non volatile memory
#33Charge packet metering for coarse/fine programming of non-volatile memory
#34Charge packet metering for coarse/fine programming of non-volatile memory
#35Charge packet metering for coarse/fine programming of non-volatile memory
#36Efficient verification for coarse/fine programming of non-volatile memory