199915 ⎘
Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor; Indexing scheme relating to and sub-groups for features not covered by these groups; Miscellaneous aspects Multilevel memory comprising elements in triple well structure
Substrate bias during program of non-volatile storage
#2Semiconductor memory device capable of memorizing multivalued data
#3Nonvolatile memory device, driving method thereof, and memory system having the same
#4Semiconductor memory device and method of operating the same
#5Semiconductor memory device capable of memorizing multivalued data
#6Non-volatile semiconductor memory device
#7High voltage generation and control in source-side injection programming of non-volatile memory
#8Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
#9Information recording and reproducing device
#10Information recording and reproducing device for high-recording density
#11Nonvolatile memory device, driving method thereof, and memory system having the same
#12Information recording and reproducing device
#13Semiconductor memory device capable of memorizing multivalued data
#14CLOCK SYNCHRONIZED NON-VOLATILE MEMORY DEVICE
#15Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
#16Apparatus and method for inhibiting excess leakage current in unselected nonvolatile memory cells in an array
#17Non-volatile semiconductor memory device
#18Semiconductor memory device capable of correcting a read level properly
#19Semiconductor memory device for storing multilevel data
#20High voltage generation and control in source-side injection programming of non-volatile memory
#21Method for controlling a non-volatile semiconductor memory device
#22Semiconductor memory device provided with MOS transistor having charge accumulation layer and control gate and data write method of NAND flash memory
#23Nonvolatile semiconductor memory device
#24Semiconductor memory device and data erase method thereof
#25Non-volatile storage with source bias all bit line sensing
#26Method for source bias all bit line sensing in non-volatile storage
#27Semiconductor memory device and read method thereof
#28NONVOLATILE SEMICONDUCTOR MEMORY HAVING PLURAL DATA STORAGE PORTIONS FOR A BIT LINE CONNECTED TO MEMORY CELLS
#29METHOD FOR TEMPERATURE COMPENSATING BIT LINE DURING SENSE OPERATIONS IN NON-VOLATILE STORAGE
#30NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DURING SENSE OPERATIONS
#31Method for current sensing with biasing of source and P-well in non-volatile storage
#32Method for sensing negative threshold voltages in non-volatile storage using current sensing
#33Non-volatile storage using current sensing with biasing of source and P-Well
#34Non-volatile storage with current sensing of negative threshold voltages
#35Non-volatile storage with adaptive body bias
#36Biasing non-volatile storage to compensate for temperature variations
#37Reducing program disturb in non-volatile storage using early source-side boosting
#38Clock synchronized non-volatile memory device
#39Semiconductor memory device capable of correcting a read level properly
#40Multi-level voltage adjustment
#41Semiconductor memory device capable of executing high-speed read
#42Semiconductor memory device for storing multilevel data
#43Semiconductor memory device and dynamic latch refresh method thereof
#44Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
#45Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages
#46High-speed writable semiconductor memory device
#47Semiconductor memory device capable of memorizing multivalued data
#48Clock synchronized non-volatile memory device
#49Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
#50Non-volatile semiconductor memory device
#51Multi-bits storage memory
#52Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
#53Clock synchronized nonvolatile memory device
#54Clock synchronized nonvolatile memory device
#55Low voltage EEPROM memory arrays