G11C2211/564 - CPC Classification

Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor; Indexing scheme relating to and sub-groups for features not covered by these groups Miscellaneous aspects

• G11C2211/5641 » Multilevel memory having cells with different number of storage levels 815
• G11C2211/5642 » Multilevel memory with buffers, latches, registers at input or output 297
• G11C2211/5643 » Multilevel memory comprising cache storage devices 107
• G11C2211/5644 » Multilevel memory comprising counting devices 116
• G11C2211/5645 » Multilevel memory with current-mirror arrangements 46
• G11C2211/5646 » Multilevel memory with flag bits, e.g. for showing that a "first page" of a word line is programmed but not a "second page" 155
• G11C2211/5647 » Multilevel memory with bit inversion arrangement 83
• G11C2211/5648 » Multilevel memory programming, reading or erasing operations wherein the order or sequence of the operations is relevant 220
• G11C2211/5649 » Multilevel memory with plate line or layer, e.g. in order to lower programming voltages 12
• G11C2211/565 » Multilevel memory comprising elements in triple well structure 55