199948 ⎘
Indexing scheme relating to for features not covered by this group; Resistive array aspects Array wherein the memory cells of a group share an access device, all the memory cells of the group having a common electrode and the access device being not part of a word line or a bit line driver
SPARSE PIERS FOR THREE-DIMENSIONAL MEMORY ARRAYS
#2Differential programming of two-terminal memory with intrinsic error suppression and wordline coupling
#3Sparse piers for three-dimensional memory arrays
#4RESISTIVE MEMORY ARCHITECTURES WITH MULTIPLE MEMORY CELLS PER ACCESS DEVICE
#5Processing unit with fast read speed memory device
#6Fast read speed memory device
#7Resistive memory architectures with multiple memory cells per access device
#8Fast read speed memory device
#9Memory device
#10Resistive memory architectures with multiple memory cells per access device
#11Memory circuit and formation method thereof
#12Memory circuit and formation method thereof
#13Fast read speed memory device
#14Memristive learning for neuromorphic circuits
#15Memory write and read assistance using negative differential resistance devices
#16Memory device
#17Memory device
#18Memory circuit and formation method thereof
#19Logic integrated circuit and semiconductor device
#20Resistive memory architectures with multiple memory cells per access device
#21Fast read speed memory device
#22Memory system
#23Anti-fuses memory cell and memory apparatus
#24Memory including bi-polar memristor
#25Systems and methods for non-volatile flip flops
#26Memory device
#27Resistive memory architectures with multiple memory cells per access device
#28Nonvolatile semiconductor memory device
#29Memory device and method for manufacturing the same
#30Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture
#31Method, apparatus and device for operating logical operation array of resistive random access memory
#32Variable change memory and the writing method of the same
#33Semiconductor memory device including semi-selectable memory cells
#34Memory device
#35High endurance non-volatile storage
#36Disturb condition detection for a resistive random access memory
#37Fast read speed memory device
#38Monolithic three dimensional memory arrays with staggered vertical bit lines and dual-gate bit line select transistors
#39Nonvolatile memory integrated circuit with built-in redundancy
#40Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines
#41Redundant magnetic tunnel junctions in magnetoresistive memory
#42Differential magnetic tunnel junction pair including a sense layer with a high coercivity portion
#43Method for programming a bipolar resistive switching memory device
#44Multi-context configuration memory
#45Switching element having overlapped wiring connections and method for fabricating semiconductor switching device
#46Electronic device having semiconductor memory comprising variable resistance elements for storing data
#47Integrated circuit device
#48Nonvolatile memory device having a gate coupled to resistors
#49Memory array architecture with two-terminal memory cells
#50Semiconductor memory device
#51Semiconductor memory device
#52Electronic device and method for fabricating the same
#53Resistive memory architectures with multiple memory cells per access device
#54Method of operating FET low current 3D re-ram
#551D-2R memory architecture
#56Semiconductor storage device
#57Nonvolatile logic gate device
#58Memory cells with rectifying device
#59Semiconductor memory device and memory system
#60Electronic device
#61Resistive switching memory
#623D structure for advanced SRAM design to avoid half-selected issue
#63Electronic device
#64High operating speed resistive random access memory
#65Memory device
#66Fast read speed memory device
#67Programming two-terminal memory cells with reduced program current
#68Stackable non-volatile memory
#69Resistive non-volatile memory
#70Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
#71Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture
#72Three-dimensional memory array and operation scheme
#73Circuit for concurrent read operation and method therefor
#74Resistive random access memory equalization and sensing
#75Non-volatile memory with overwrite capability and low write amplification
#76Resistive switching memory
#77OTP scheme with multiple magnetic tunnel junction devices in a cell
#78Memory control device, non-volatile memory, and memory control method
#79Memory cell, a method for forming a memory cell, and a method for operating a memory cell
#80Memory device
#81Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
#82Multi-bit spin-momentum-transfer magnetoresistence random access memory with single magnetic-tunnel-junction stack
#83Non-volatile memory device
#84Nonvolatile memory devices that use resistance materials and internal electrodes
#85Circuit for concurrent read operation and method therefor
#86Mobile terminal and display controlling method therein
#87Memory array architecture with two-terminal memory cells
#88Phase-change memory device
#89Selector type electronic device functioning by ionic conduction
#90Magnetic Memory Cell With Multi-Level Cell (MLC) Data Storage Capability
#91Semiconductor memory device
#92Circuit for concurrent read operation and method therefor
#93Resistive memory architectures with multiple memory cells per access device
#94Resistive changing memory cell architecture having a select transistor coupled to a resistance changing memory element
#95Hierarchical cross-point array of non-volatile memory
#96Resistance change memory device with three-dimensional structure, and device array, electronic product and manufacturing method therefor
#97Semiconductor device
#98Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
#99Memory cells with rectifying device
#100Memory device having variable resistance memory cells disposed at crosspoint of wirings
#101Nonvolatile memory devices that use resistance materials and internal electrodes, and related methods and processing systems
#102Information recording and reproducing device
#103Information recording and reproducing device for high-recording density
#104Resistive random access memory and the method of operating the same
#105Information recording and reproducing device
#106Active protection device for resistive random access memory (RRAM) formation
#107Hierarchical cross-point array of non-volatile memory
#108Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture
#109Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture
#110Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines
#111NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
#112MEMORY DEVICE, MEMORY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT HAVING VARIABLE RESISTANCE
#113Quad memory cell and method of making same
#114Resistive memory architectures with multiple memory cells per access device
#115Non-volatile semiconductor storage device and method of manufacturing the same
#116Memory array with a selector connected to multiple resistive cells
#117High density resistance based semiconductor device
#118Resistance change element, method for manufacturing the same, and semiconductor memory
#119Cross point memory cell with distributed diodes and method of making same
#120Method of Operating an Integrated Circuit, and Integrated Circuit
#121Semiconductor memory device
#122Nonvolatile memory devices that use resistance materials and internal electrodes, and related methods and processing systems
#123Pyridinyl Amides for the Treatment of CNS and Metabolic Disorders
#124Multiple memory cells with rectifying device
#125Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
#126Integrated circuit including diode memory cells
#127System and method for reading multiple magnetic tunnel junctions with a single select transistor
#128Memory device, memory circuit and semiconductor integrated circuit having variable resistance
#129Phase-change random access memory device and semiconductor memory device
#130Memory array with a selector connected to multiple resistive cells
#131Electronic circuit with a memory matrix
#132Resistive memory architectures with multiple memory cells per access device
#133Increasing effective transistor width in memory arrays with dual bitlines
#134Integrated Circuit, Memory Module, Method of Operating an Integrated Circuit, and Computing System
#135Phase-change memory device that stores information in a non-volatile manner by changing states of a memory material
#136STRUCTURE FOR INCREASING EFFECTIVE TRANSISTOR WITDTH IN MEMORY ARRAYS WITH DUAL BITLINES
#137Method and structure for increasing effective transistor width in memory arrays with dual bitlines
#138NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF WRITING INTO THE SAME
#139Multi-state resistance changing memory with a word line driver for applying a same program voltage to the word line
#140Multi-bit resistive memory
#141Nonvolatile semiconductor memory device and phase change memory device
#142CBRAM cell and CBRAM array, and method of operating thereof
#143Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device
#144Multilevel phase-change memory element and operating method
#145Integrated circuit including resistivity changing material element
#146Resistive memory arrangement
#147Thin film memory device having a variable resistance
#148Memory device, memory circuit and semiconductor integrated circuit having variable resistance
#149Serial transistor-cell array architecture
#150Non-volatile memory device having toggle cell
#151Phase change memory device
#152Phase-change multi-level cell and operating method thereof
#153Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device
#154Serial transistor-cell array architecture
#155Phase-change semiconductor memory device and method of programming same
#156Multilevel phase-change memory element and operating method
#157Resistive memory arrangement
#158High-density SOI cross-point memory fabricating method
#159Data storage device and method of forming the same
#160Memory cell having an electric field programmable storage element, and method of operating same
#161Method for manufacturing nonvolatile semiconductor memory device
#162Nonvolatile semiconductor memory device
#163Serial transistor-cell array architecture
#164Serial transistor-cell array architecture
#165Data storage device and method of forming the same