199954 ⎘
Indexing scheme relating to and subgroups, for features not directly covered by these groups Structural aspects of erasable programmable read-only memories
Sub-classes:SEMICONDUCTOR STORAGE DEVICE, CONTROL METHOD OF SEMICONDUCTOR STORAGE DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR STORAGE DEVICE
#2SUB-BLOCK SEPARATION IN NAND MEMORY THROUGH WORD LINE BASED SELECTORS
#3NON-VOLATILE MEMERY CELL AND METHOD OF FORMING THE SAME
#43D MEMORY DEVICE INCLUDING SHARED SELECT GATE CONNECTIONS BETWEEN MEMORY BLOCKS
#5SEMICONDUCTOR MEMORY DEVICE
#6NOR Memory Array, NOR Memory and Electronic Device
#7MEMORY DEVICE FOR INDIVIDUALLY APPLYING VOLTAGE TO DRAIN SELECT LINES
#8SEMICONDUCTOR MEMORY DEVICE
#9METHOD FOR OPERATING THREE-DIMENSIONAL FLASH MEMORY
#10METHOD OF PROGRAMMING FLASH MEMORY
#113D memory device including shared select gate connections between memory blocks
#12Chalcogenide memory device compositions
#133D memory device including shared select gate connections between memory blocks
#143D memory device including shared select gate connections between memory blocks
#15Memory cell with a flat-topped floating gate structure
#163D memory device including shared select gate connections between memory blocks
#17Non-volatile memory device and method of fabricating the same
#18Non-volatile semiconductor storage device for reducing the number of memory cells arranged along a control to which a memory gate voltage is applied
#19Memory device, memory system, method of operating memory device, and method of operating memory system
#20Method for determining an optimal voltage pulse for programming a flash memory cell
#21Semiconductor devices including vertical cell strings that are commonly connected