199822 ⎘
Checking stores for correct operation ; Subsequent repair ; Testing stores during standby or offline operation; Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a reduced amount of fuses
Anti-fuse devices and anti-fuse units
#2Reduced footprint fuse circuit
#3Systems and methods for improving fuse systems in memory devices
#4Semiconductor device
#5Repair circuit, semiconductor apparatus and semiconductor system using the same
#6Memory address repair without enable fuses
#7Stacked device remapping and repair
#8System including memory stacks
#9Reduction of fusible links and associated circuitry on memory dies
#10REDUNDANCY DATA STORAGE CIRCUIT, REDUNDANCY DATA CONTROL METHOD AND REPAIR DETERMINATION CIRCUIT OF SEMICONDUCTOR MEMORY
#11Fuse set and semiconductor integrated circuit apparatus having the same
#12FUSE SET OF SEMICONDUCTOR MEMORY AND REPAIR DETERMINATION CIRCUIT USING THE SAME
#13Stacked device remapping and repair
#14Bad page marking strategy for fast readout in memory
#15Method for selectively retrieving column redundancy data in memory device
#16Stacked device remapping and repair
#17Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer
#18Memory system including multiple memory stacks
#19Memory address repair without enable fuses
#20Redundancy program circuit and methods thereof
#21Redundancy program circuit and methods thereof
#22Redundancy program circuit and methods thereof
#23Selection method of bit line redundancy repair and apparatus performing the same
#24Fuse farm redundancy method and system
#25Method and Apparatus for Selecting Redundant Memory Cells
#26Methods and apparatus of stacking DRAMs
#27Semiconductor integrated circuit including memory macro
#28Method and Apparatus For Repairing Defective Cell for Each Cell Section Word Line
#29Reparable semiconductor memory device
#30Redundancy program circuit and methods thereof
#31Integrated electrical module with regular and redundant elements
#32FUSE LATCH CIRCUIT, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY SYSTEM
#33Repair I/O fuse circuit of semiconductor memory device
#34Redundant circuit for semiconductor memory device
#35Built-in self-repairable memory
#36Methods and apparatus of stacking DRAMs
#37Memory address repair without enable fuses
#38Methods and apparatus of stacking DRAMs
#39Semiconductor memory device with redundancy function
#40Semiconductor device with a plurality of fuse elements and method for programming the device
#41Reduction of fusible links and associated circuitry on memory dies
#42Reduction of fusible links and associated circuitry on memory dies
#43Reduction of fusible links and associated circuitry on memory dies
#44Reduction of fusible links and associated circuitry on memory dies
#45Decoder based set associative repair cache systems and methods
#46Apparatus and method for semiconductor device repair with reduced number of programmable elements
#47Integrated semiconductor memory
#48Reduction of fusible links and associated circuitry on memory dies
#49Zero-enabled fuse-set
#50Memory address repair without enable fuses
#51Redundancy program circuit and methods thereof
#52Efficient recovery of failed memory cell
#53Apparatus and method for semiconductor device repair with reduced number of programmable elements
#54Redundancy semiconductor memory device with error correction code (ECC) circuits for correcting errors in recovery fuse data
#55Semiconductor integrated circuit provided with semiconductor memory circuit having redundancy function and method for transferring address data
#56Redundancy circuit
#57Redundancy circuit in semiconductor memory device having a multiblock structure
#58Reduced footprint fuse circuit
#59Compensation circuit and compensation method